at91sam4: Add flash description and chipid for SAM4Cxx variants.
Chip ID and flash layout taken from Atmel-11102F-ATARM-SAM4C32-SAM4C16-SAM4C8-SAM4C4-Datasheet_27-Mar-15 and tested on a SAM4C32-EK (rev A). Change-Id: I68aae5b60994c0b5964ea9031d40bc76ba025675 Signed-off-by: Owen Kirby <oskirby@gmail.com> Reviewed-on: http://openocd.zylin.com/3527 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>gitignore-build
Owen Kirby
Paul Fertser
parent
aa2c38d50c
commit
c591f109c3
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@ -65,8 +65,9 @@
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#define REG_NAME_WIDTH (12)
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/* at91sam4s/at91sam4e series (has always one flash bank)*/
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/* at91sam4s/at91sam4e/at91sam4c series (has always one flash bank)*/
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#define FLASH_BANK_BASE_S 0x00400000
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#define FLASH_BANK_BASE_C 0x01000000
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/* at91sam4sd series (two one flash banks), first bank address */
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#define FLASH_BANK0_BASE_SD FLASH_BANK_BASE_S
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@ -75,6 +76,10 @@
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/* at91sam4sd32x, second bank address */
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#define FLASH_BANK1_BASE_2048K_SD (FLASH_BANK0_BASE_SD+(2048*1024/2))
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/* at91sam4c32x, first and second bank address */
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#define FLASH_BANK0_BASE_C32 FLASH_BANK_BASE_C
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#define FLASH_BANK1_BASE_C32 (FLASH_BANK_BASE_C+(2048*1024/2))
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#define AT91C_EFC_FCMD_GETD (0x0) /* (EFC) Get Flash Descriptor */
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#define AT91C_EFC_FCMD_WP (0x1) /* (EFC) Write Page */
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#define AT91C_EFC_FCMD_WPL (0x2) /* (EFC) Write Page and Lock */
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@ -258,6 +263,188 @@ static struct sam4_chip *get_current_sam4(struct command_context *cmd_ctx)
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/* these are used to *initialize* the "pChip->details" structure. */
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static const struct sam4_chip_details all_sam4_details[] = {
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/* Start at91sam4c* series */
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/* at91sam4c32e - LQFP144 */
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{
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.chipid_cidr = 0xA66D0EE0,
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.name = "at91sam4c32e",
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.total_flash_size = 2024 * 1024,
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.total_sram_size = 256 * 1024,
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.n_gpnvms = 3,
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.n_banks = 2,
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/* .bank[0] = { */
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{
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{
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.probed = 0,
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.pChip = NULL,
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.pBank = NULL,
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.bank_number = 0,
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.base_address = FLASH_BANK0_BASE_C32,
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.controller_address = 0x400e0a00,
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.flash_wait_states = 5,
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.present = 1,
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.size_bytes = 1024 * 1024,
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.nsectors = 128,
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.sector_size = 8192,
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.page_size = 512,
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},
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/* .bank[1] = { */
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{
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.probed = 0,
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.pChip = NULL,
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.pBank = NULL,
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.bank_number = 1,
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.base_address = FLASH_BANK1_BASE_C32,
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.controller_address = 0x400e0c00,
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.flash_wait_states = 5,
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.present = 1,
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.size_bytes = 1024 * 1024,
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.nsectors = 128,
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.sector_size = 8192,
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.page_size = 512,
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},
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},
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},
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/* at91sam4c32c - LQFP100 */
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{
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.chipid_cidr = 0xA64D0EE0,
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.name = "at91sam4c32c",
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.total_flash_size = 2024 * 1024,
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.total_sram_size = 256 * 1024,
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.n_gpnvms = 3,
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.n_banks = 2,
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/* .bank[0] = { */
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{
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{
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.probed = 0,
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.pChip = NULL,
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.pBank = NULL,
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.bank_number = 0,
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.base_address = FLASH_BANK0_BASE_C32,
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.controller_address = 0x400e0a00,
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.flash_wait_states = 5,
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.present = 1,
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.size_bytes = 1024 * 1024,
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.nsectors = 128,
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.sector_size = 8192,
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.page_size = 512,
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},
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/* .bank[1] = { */
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{
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.probed = 0,
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.pChip = NULL,
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.pBank = NULL,
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.bank_number = 1,
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.base_address = FLASH_BANK1_BASE_C32,
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.controller_address = 0x400e0c00,
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.flash_wait_states = 5,
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.present = 1,
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.size_bytes = 1024 * 1024,
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.nsectors = 128,
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.sector_size = 8192,
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.page_size = 512,
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},
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},
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},
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/* at91sam4c16c - LQFP100 */
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{
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.chipid_cidr = 0xA64C0CE0,
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.name = "at91sam4c16c",
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.total_flash_size = 1024 * 1024,
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.total_sram_size = 128 * 1024,
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.n_gpnvms = 2,
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.n_banks = 1,
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{
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/* .bank[0] = {*/
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{
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.probed = 0,
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.pChip = NULL,
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.pBank = NULL,
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.bank_number = 0,
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.base_address = FLASH_BANK_BASE_C,
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.controller_address = 0x400e0a00,
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.flash_wait_states = 5,
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.present = 1,
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.size_bytes = 1024 * 1024,
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.nsectors = 128,
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.sector_size = 8192,
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.page_size = 512,
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},
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/* .bank[1] = {*/
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{
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.present = 0,
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.probed = 0,
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.bank_number = 1,
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},
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},
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},
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/* at91sam4c8c - LQFP100 */
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{
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.chipid_cidr = 0xA64C0AE0,
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.name = "at91sam4c8c",
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.total_flash_size = 512 * 1024,
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.total_sram_size = 128 * 1024,
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.n_gpnvms = 2,
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.n_banks = 1,
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{
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/* .bank[0] = {*/
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{
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.probed = 0,
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.pChip = NULL,
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.pBank = NULL,
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.bank_number = 0,
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.base_address = FLASH_BANK_BASE_C,
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.controller_address = 0x400e0a00,
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.flash_wait_states = 5,
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.present = 1,
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.size_bytes = 512 * 1024,
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.nsectors = 64,
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.sector_size = 8192,
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.page_size = 512,
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},
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/* .bank[1] = {*/
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{
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.present = 0,
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.probed = 0,
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.bank_number = 1,
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},
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},
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},
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/* at91sam4c4c (rev B) - LQFP100 */
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{
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.chipid_cidr = 0xA64C0CE5,
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.name = "at91sam4c4c",
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.total_flash_size = 256 * 1024,
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.total_sram_size = 128 * 1024,
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.n_gpnvms = 2,
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.n_banks = 1,
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{
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/* .bank[0] = {*/
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{
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.probed = 0,
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.pChip = NULL,
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.pBank = NULL,
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.bank_number = 0,
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.base_address = FLASH_BANK_BASE_C,
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.controller_address = 0x400e0a00,
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.flash_wait_states = 5,
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.present = 1,
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.size_bytes = 256 * 1024,
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.nsectors = 32,
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.sector_size = 8192,
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.page_size = 512,
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},
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/* .bank[1] = {*/
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{
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.present = 0,
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.probed = 0,
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.bank_number = 1,
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},
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},
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},
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/* Start at91sam4e* series */
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/*atsam4e16e - LQFP144/LFBGA144*/
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@ -1402,7 +1589,7 @@ static uint32_t sam4_reg_fieldname(struct sam4_chip *pChip,
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static const char _unknown[] = "unknown";
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static const char *const eproc_names[] = {
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_unknown, /* 0 */
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"Cortex-M7", /* 0 */
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"arm946es", /* 1 */
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"arm7tdmi", /* 2 */
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"Cortex-M3", /* 3 */
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@ -1430,7 +1617,7 @@ static const char *const nvpsize[] = {
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"64K bytes", /* 5 */
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_unknown, /* 6 */
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"128K bytes", /* 7 */
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_unknown, /* 8 */
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"160K bytes", /* 8 */
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"256K bytes", /* 9 */
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"512K bytes", /* 10 */
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_unknown, /* 11 */
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@ -1478,6 +1665,8 @@ static const struct archnames { unsigned value; const char *name; } archnames[]
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{ 0x60, "AT91SAM7Axx Series" },
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{ 0x61, "AT91SAM7AQxx Series" },
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{ 0x63, "AT91x63 Series" },
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{ 0x64, "SAM4CxxC (100-pin version)" },
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{ 0x66, "SAM4CxxE (144-pin version)" },
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{ 0x70, "AT91SAM7Sxx Series" },
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{ 0x71, "AT91SAM7XCxx Series" },
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{ 0x72, "AT91SAM7SExx Series" },
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@ -1975,15 +2164,17 @@ FLASH_BANK_COMMAND_HANDLER(sam4_flash_bank_command)
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/* at91sam4s series only has bank 0*/
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/* at91sam4sd series has the same address for bank 0 (FLASH_BANK0_BASE_SD)*/
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case FLASH_BANK_BASE_S:
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case FLASH_BANK_BASE_C:
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bank->driver_priv = &(pChip->details.bank[0]);
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bank->bank_number = 0;
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pChip->details.bank[0].pChip = pChip;
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pChip->details.bank[0].pBank = bank;
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break;
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/* Bank 1 of at91sam4sd series */
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/* Bank 1 of at91sam4sd/at91sam4c32 series */
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case FLASH_BANK1_BASE_1024K_SD:
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case FLASH_BANK1_BASE_2048K_SD:
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case FLASH_BANK1_BASE_C32:
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bank->driver_priv = &(pChip->details.bank[1]);
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bank->bank_number = 1;
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pChip->details.bank[1].pChip = pChip;
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@ -0,0 +1,9 @@
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# script for ATMEL sam4c32, a Cortex-M4 chip
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#
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source [find target/at91sam4XXX.cfg]
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set _FLASHNAME $_CHIPNAME.flash0
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flash bank $_FLASHNAME at91sam4 0x01000000 0 1 1 $_TARGETNAME
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set _FLASHNAME $_CHIPNAME.flash1
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flash bank $_FLASHNAME at91sam4 0x01100000 0 1 1 $_TARGETNAME
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@ -0,0 +1,7 @@
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# script for ATMEL sam4c, a Cortex-M4 chip
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#
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source [find target/at91sam4XXX.cfg]
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME at91sam4 0x01000000 0 1 1 $_TARGETNAME
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