stlink: enable cortex special reg writes
Change-Id: I5aa02e8de6dd5ac5a6ca628ba4068decb200c689 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/378 Tested-by: jenkins__archive__
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3a550e5b5f
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c527882121
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@ -133,9 +133,7 @@ static int stm32_stlink_store_core_reg_u32(struct target *target,
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*/
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*/
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switch (num) {
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switch (num) {
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case 0 ... 18:
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case 0 ... 18:
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retval =
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retval = stlink_if->layout->api->write_reg(stlink_if->fd, num, value);
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stlink_if->layout->api->write_reg(stlink_if->fd, num,
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value);
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if (retval != ERROR_OK) {
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if (retval != ERROR_OK) {
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struct reg *r;
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struct reg *r;
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@ -145,8 +143,7 @@ static int stm32_stlink_store_core_reg_u32(struct target *target,
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r->dirty = r->valid;
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r->dirty = r->valid;
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return ERROR_JTAG_DEVICE_ERROR;
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return ERROR_JTAG_DEVICE_ERROR;
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}
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}
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LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", (int)num,
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LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", (int)num, value);
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value);
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break;
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break;
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case ARMV7M_PRIMASK:
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case ARMV7M_PRIMASK:
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@ -157,7 +154,8 @@ static int stm32_stlink_store_core_reg_u32(struct target *target,
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* in one Debug Core register. So say r0 and r2 docs;
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* in one Debug Core register. So say r0 and r2 docs;
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* it was removed from r1 docs, but still works.
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* it was removed from r1 docs, but still works.
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*/
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*/
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/* cortexm3_dap_read_coreregister_u32(swjdp, ®, 20); */
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stlink_if->layout->api->read_reg(stlink_if->fd, 20, ®);
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switch (num) {
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switch (num) {
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case ARMV7M_PRIMASK:
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case ARMV7M_PRIMASK:
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@ -177,10 +175,9 @@ static int stm32_stlink_store_core_reg_u32(struct target *target,
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break;
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break;
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}
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}
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/* cortexm3_dap_write_coreregister_u32(swjdp, reg, 20); */
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stlink_if->layout->api->write_reg(stlink_if->fd, 20, reg);
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LOG_DEBUG("write special reg %i value 0x%" PRIx32 " ", (int)num,
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LOG_DEBUG("write special reg %i value 0x%" PRIx32 " ", (int)num, value);
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value);
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break;
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break;
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default:
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default:
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