stlink: enable cortex special reg writes

Change-Id: I5aa02e8de6dd5ac5a6ca628ba4068decb200c689
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/378
Tested-by: jenkins
__archive__
Spencer Oliver 2012-01-13 11:23:27 +00:00
parent 3a550e5b5f
commit c527882121
1 changed files with 6 additions and 9 deletions

View File

@ -133,9 +133,7 @@ static int stm32_stlink_store_core_reg_u32(struct target *target,
*/ */
switch (num) { switch (num) {
case 0 ... 18: case 0 ... 18:
retval = retval = stlink_if->layout->api->write_reg(stlink_if->fd, num, value);
stlink_if->layout->api->write_reg(stlink_if->fd, num,
value);
if (retval != ERROR_OK) { if (retval != ERROR_OK) {
struct reg *r; struct reg *r;
@ -145,8 +143,7 @@ static int stm32_stlink_store_core_reg_u32(struct target *target,
r->dirty = r->valid; r->dirty = r->valid;
return ERROR_JTAG_DEVICE_ERROR; return ERROR_JTAG_DEVICE_ERROR;
} }
LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", (int)num, LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", (int)num, value);
value);
break; break;
case ARMV7M_PRIMASK: case ARMV7M_PRIMASK:
@ -157,7 +154,8 @@ static int stm32_stlink_store_core_reg_u32(struct target *target,
* in one Debug Core register. So say r0 and r2 docs; * in one Debug Core register. So say r0 and r2 docs;
* it was removed from r1 docs, but still works. * it was removed from r1 docs, but still works.
*/ */
/* cortexm3_dap_read_coreregister_u32(swjdp, &reg, 20); */
stlink_if->layout->api->read_reg(stlink_if->fd, 20, &reg);
switch (num) { switch (num) {
case ARMV7M_PRIMASK: case ARMV7M_PRIMASK:
@ -177,10 +175,9 @@ static int stm32_stlink_store_core_reg_u32(struct target *target,
break; break;
} }
/* cortexm3_dap_write_coreregister_u32(swjdp, reg, 20); */ stlink_if->layout->api->write_reg(stlink_if->fd, 20, reg);
LOG_DEBUG("write special reg %i value 0x%" PRIx32 " ", (int)num, LOG_DEBUG("write special reg %i value 0x%" PRIx32 " ", (int)num, value);
value);
break; break;
default: default: