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stm32l4x.c: Free r6/7 for 64-bit operations. 

Use r5 instead of r7.

Change-Id: I350d00eeabe9446d64dba8f1dbffb5d4beab7dd6
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3138
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
__archive__
Uwe Bonnes 2015-11-30 12:05:43 +01:00 committed by Freddie Chopin
parent 888d5a5ec9
commit bfb02d5ba1
2 changed files with 13 additions and 13 deletions
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18
contrib/loaders/flash/stm32l4x.S
View File

@ -51,8 +51,8 @@
* r4 = flash base * r4 = flash base
* *
* Clobbered: * Clobbered:
* r5 - rp
* r6 - temp * r6 - temp
* r7 - rp
* r8 - wp, tmp * r8 - wp, tmp
*/ */
@ -63,18 +63,18 @@ wait_fifo:
ldr r8, [r0, #0] /* read wp */ ldr r8, [r0, #0] /* read wp */
cmp r8, #0 /* abort if wp == 0 */ cmp r8, #0 /* abort if wp == 0 */
beq exit beq exit
ldr r7, [r0, #4] /* read rp */ ldr r5, [r0, #4] /* read rp */
subs r6, r8, r7 /* number of bytes available for read in r6*/ subs r6, r8, r5 /* number of bytes available for read in r6*/
cmp r6, #7 /* wait until 8 bytes are available */ cmp r6, #7 /* wait until 8 bytes are available */
bcc wait_fifo bcc wait_fifo
ldr r6, STM32_PROG ldr r6, STM32_PROG
str r6, [r4, #STM32_FLASH_CR_OFFSET] str r6, [r4, #STM32_FLASH_CR_OFFSET]
ldr r6, [r7], #0x04 /* read one word from src, increment ptr */ ldr r6, [r5], #0x04 /* read one word from src, increment ptr */
str r6, [r2], #0x04 /* write one word to dst, increment ptr */ str r6, [r2], #0x04 /* write one word to dst, increment ptr */
ldr r6, [r7], #0x04 /* read one word from src, increment ptr */ ldr r6, [r5], #0x04 /* read one word from src, increment ptr */
str r6, [r2], #0x04 /* write one word to dst, increment ptr */ str r6, [r2], #0x04 /* write one word to dst, increment ptr */
dsb dsb
busy: busy:
ldr r6, [r4, #STM32_FLASH_SR_OFFSET] ldr r6, [r4, #STM32_FLASH_SR_OFFSET]
tst r6, #0x10000 /* BSY (bit16) == 1 => operation in progress */ tst r6, #0x10000 /* BSY (bit16) == 1 => operation in progress */
@ -82,10 +82,10 @@ busy:
tst r6, #0xfa /* PGSERR | PGPERR | PGAERR | WRPERR | PROGERR*/ tst r6, #0xfa /* PGSERR | PGPERR | PGAERR | WRPERR | PROGERR*/
bne error /* fail... */ bne error /* fail... */
cmp r7, r1 /* wrap rp at end of buffer */ cmp r5, r1 /* wrap rp at end of buffer */
it cs it cs
addcs r7, r0, #8 /* skip loader args */ addcs r5, r0, #8 /* skip loader args */
str r7, [r0, #4] /* store rp */ str r5, [r0, #4] /* store rp */
subs r3, r3, #1 /* decrement dword count */ subs r3, r3, #1 /* decrement dword count */
cbz r3, exit /* loop if not done */ cbz r3, exit /* loop if not done */
b wait_fifo b wait_fifo

8
src/flash/nor/stm32l4x.c
View File

@ -463,12 +463,12 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer,
*/ */
static const uint8_t stm32l4_flash_write_code[] = { static const uint8_t stm32l4_flash_write_code[] = {
0xd0, 0xf8, 0x00, 0x80, 0xb8, 0xf1, 0x00, 0x0f, 0x22, 0xd0, 0x47, 0x68, 0xd0, 0xf8, 0x00, 0x80, 0xb8, 0xf1, 0x00, 0x0f, 0x22, 0xd0, 0x45, 0x68,
0xb8, 0xeb, 0x07, 0x06, 0x07, 0x2e, 0xf5, 0xd3, 0xdf, 0xf8, 0x3c, 0x60, 0xb8, 0xeb, 0x05, 0x06, 0x07, 0x2e, 0xf5, 0xd3, 0xdf, 0xf8, 0x3c, 0x60,
0x66, 0x61, 0x57, 0xf8, 0x04, 0x6b, 0x42, 0xf8, 0x04, 0x6b, 0x57, 0xf8, 0x66, 0x61, 0x55, 0xf8, 0x04, 0x6b, 0x42, 0xf8, 0x04, 0x6b, 0x55, 0xf8,
0x04, 0x6b, 0x42, 0xf8, 0x04, 0x6b, 0xbf, 0xf3, 0x4f, 0x8f, 0x26, 0x69, 0x04, 0x6b, 0x42, 0xf8, 0x04, 0x6b, 0xbf, 0xf3, 0x4f, 0x8f, 0x26, 0x69,
0x16, 0xf4, 0x80, 0x3f, 0xfb, 0xd1, 0x16, 0xf0, 0xfa, 0x0f, 0x07, 0xd1, 0x16, 0xf4, 0x80, 0x3f, 0xfb, 0xd1, 0x16, 0xf0, 0xfa, 0x0f, 0x07, 0xd1,
0x8f, 0x42, 0x28, 0xbf, 0x00, 0xf1, 0x08, 0x07, 0x47, 0x60, 0x01, 0x3b, 0x8d, 0x42, 0x28, 0xbf, 0x00, 0xf1, 0x08, 0x05, 0x45, 0x60, 0x01, 0x3b,
0x13, 0xb1, 0xd9, 0xe7, 0x00, 0x21, 0x41, 0x60, 0x30, 0x46, 0x00, 0xbe, 0x13, 0xb1, 0xd9, 0xe7, 0x00, 0x21, 0x41, 0x60, 0x30, 0x46, 0x00, 0xbe,
0x01, 0x00, 0x00, 0x00 0x01, 0x00, 0x00, 0x00
}; };