target/arm_adi_v5, cortex_m: retry ahbap_debugport_init few times in case of an error
Some targets need arbitrary amount of time (usually not too long) after reset (both sysresetreq and srst) to do initialisation, and SWD/JTAG is not available during that. According to PSoC4 docs, the debugger should try connecting until it succeeds. Also ahbap_debugport_init might be necessary to perform after using hardware srst too, so add it there (except for the targets that support srst_nogate since they are very unlikely to need it). Change-Id: I3598d5ff7b8e0bf3a5566a57dec4b0b2b243d297 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2601 Tested-by: jenkins__archive__
parent
13ac3d556c
commit
bdfd5bbe04
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@ -642,6 +642,8 @@ extern const struct dap_ops jtag_dp_ops;
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*/
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int ahbap_debugport_init(struct adiv5_dap *dap)
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{
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/* check that we support packed transfers */
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uint32_t csw, cfg;
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int retval;
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LOG_DEBUG(" ");
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@ -663,26 +665,27 @@ int ahbap_debugport_init(struct adiv5_dap *dap)
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dap_ap_select(dap, 0);
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dap->last_read = NULL;
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for (size_t i = 0; i < 10; i++) {
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/* DP initialization */
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dap->dp_bank_value = 0;
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retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL);
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if (retval != ERROR_OK)
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return retval;
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continue;
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retval = dap_queue_dp_write(dap, DP_CTRL_STAT, SSTICKYERR);
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if (retval != ERROR_OK)
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return retval;
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continue;
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retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL);
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if (retval != ERROR_OK)
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return retval;
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continue;
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dap->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ;
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retval = dap_queue_dp_write(dap, DP_CTRL_STAT, dap->dp_ctrl_stat);
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if (retval != ERROR_OK)
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return retval;
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continue;
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/* Check that we have debug power domains activated */
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LOG_DEBUG("DAP: wait CDBGPWRUPACK");
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@ -690,43 +693,46 @@ int ahbap_debugport_init(struct adiv5_dap *dap)
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CDBGPWRUPACK, CDBGPWRUPACK,
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DAP_POWER_DOMAIN_TIMEOUT);
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if (retval != ERROR_OK)
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return retval;
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continue;
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LOG_DEBUG("DAP: wait CSYSPWRUPACK");
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retval = dap_dp_poll_register(dap, DP_CTRL_STAT,
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CSYSPWRUPACK, CSYSPWRUPACK,
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DAP_POWER_DOMAIN_TIMEOUT);
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if (retval != ERROR_OK)
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return retval;
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continue;
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retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL);
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if (retval != ERROR_OK)
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return retval;
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continue;
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/* With debug power on we can activate OVERRUN checking */
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dap->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ | CORUNDETECT;
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retval = dap_queue_dp_write(dap, DP_CTRL_STAT, dap->dp_ctrl_stat);
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if (retval != ERROR_OK)
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return retval;
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continue;
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retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL);
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if (retval != ERROR_OK)
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return retval;
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/* check that we support packed transfers */
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uint32_t csw, cfg;
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continue;
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retval = dap_setup_accessport(dap, CSW_8BIT | CSW_ADDRINC_PACKED, 0);
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if (retval != ERROR_OK)
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return retval;
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continue;
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retval = dap_queue_ap_read(dap, AP_REG_CSW, &csw);
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if (retval != ERROR_OK)
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return retval;
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continue;
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retval = dap_queue_ap_read(dap, AP_REG_CFG, &cfg);
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if (retval != ERROR_OK)
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return retval;
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continue;
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retval = dap_run(dap);
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if (retval != ERROR_OK)
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continue;
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break;
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}
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if (retval != ERROR_OK)
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return retval;
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@ -1107,6 +1107,17 @@ static int cortex_m_deassert_reset(struct target *target)
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/* deassert reset lines */
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adapter_deassert_reset();
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enum reset_types jtag_reset_config = jtag_get_reset_config();
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if ((jtag_reset_config & RESET_HAS_SRST) &&
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!(jtag_reset_config & RESET_SRST_NO_GATING)) {
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int retval = ahbap_debugport_init(target_to_cm(target)->armv7m.arm.dap);
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if (retval != ERROR_OK) {
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LOG_ERROR("DP initialisation failed");
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return retval;
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}
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}
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return ERROR_OK;
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}
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