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target/arm_adi_v5, cortex_m: retry ahbap_debugport_init few times in case of an error 

Some targets need arbitrary amount of time (usually not too long)
after reset (both sysresetreq and srst) to do initialisation, and
SWD/JTAG is not available during that. According to PSoC4 docs, the
debugger should try connecting until it succeeds.

Also ahbap_debugport_init might be necessary to perform after using
hardware srst too, so add it there (except for the targets that
support srst_nogate since they are very unlikely to need it).

Change-Id: I3598d5ff7b8e0bf3a5566a57dec4b0b2b243d297
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2601
Tested-by: jenkins
__archive__
Paul Fertser 2015-03-13 17:55:51 +03:00
parent 13ac3d556c
commit bdfd5bbe04
2 changed files with 68 additions and 51 deletions
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108
src/target/arm_adi_v5.c
View File

@ -642,6 +642,8 @@ extern const struct dap_ops jtag_dp_ops;
*/ */
int ahbap_debugport_init(struct adiv5_dap *dap) int ahbap_debugport_init(struct adiv5_dap *dap)
{ {
/* check that we support packed transfers */
uint32_t csw, cfg;
int retval; int retval;
LOG_DEBUG(" "); LOG_DEBUG(" ");
@ -663,70 +665,74 @@ int ahbap_debugport_init(struct adiv5_dap *dap)
dap_ap_select(dap, 0); dap_ap_select(dap, 0);
dap->last_read = NULL; dap->last_read = NULL;
/* DP initialization */ for (size_t i = 0; i < 10; i++) {
/* DP initialization */
dap->dp_bank_value = 0; dap->dp_bank_value = 0;
retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL); retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; continue;
retval = dap_queue_dp_write(dap, DP_CTRL_STAT, SSTICKYERR); retval = dap_queue_dp_write(dap, DP_CTRL_STAT, SSTICKYERR);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; continue;
retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL); retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; continue;
dap->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ; dap->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ;
retval = dap_queue_dp_write(dap, DP_CTRL_STAT, dap->dp_ctrl_stat); retval = dap_queue_dp_write(dap, DP_CTRL_STAT, dap->dp_ctrl_stat);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; continue;
/* Check that we have debug power domains activated */ /* Check that we have debug power domains activated */
LOG_DEBUG("DAP: wait CDBGPWRUPACK"); LOG_DEBUG("DAP: wait CDBGPWRUPACK");
retval = dap_dp_poll_register(dap, DP_CTRL_STAT, retval = dap_dp_poll_register(dap, DP_CTRL_STAT,
CDBGPWRUPACK, CDBGPWRUPACK, CDBGPWRUPACK, CDBGPWRUPACK,
DAP_POWER_DOMAIN_TIMEOUT); DAP_POWER_DOMAIN_TIMEOUT);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; continue;
LOG_DEBUG("DAP: wait CSYSPWRUPACK"); LOG_DEBUG("DAP: wait CSYSPWRUPACK");
retval = dap_dp_poll_register(dap, DP_CTRL_STAT, retval = dap_dp_poll_register(dap, DP_CTRL_STAT,
CSYSPWRUPACK, CSYSPWRUPACK, CSYSPWRUPACK, CSYSPWRUPACK,
DAP_POWER_DOMAIN_TIMEOUT); DAP_POWER_DOMAIN_TIMEOUT);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; continue;
retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL); retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; continue;
/* With debug power on we can activate OVERRUN checking */ /* With debug power on we can activate OVERRUN checking */
dap->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ | CORUNDETECT; dap->dp_ctrl_stat = CDBGPWRUPREQ | CSYSPWRUPREQ | CORUNDETECT;
retval = dap_queue_dp_write(dap, DP_CTRL_STAT, dap->dp_ctrl_stat); retval = dap_queue_dp_write(dap, DP_CTRL_STAT, dap->dp_ctrl_stat);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; continue;
retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL); retval = dap_queue_dp_read(dap, DP_CTRL_STAT, NULL);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; continue;
/* check that we support packed transfers */ retval = dap_setup_accessport(dap, CSW_8BIT | CSW_ADDRINC_PACKED, 0);
uint32_t csw, cfg; if (retval != ERROR_OK)
continue;
retval = dap_setup_accessport(dap, CSW_8BIT | CSW_ADDRINC_PACKED, 0); retval = dap_queue_ap_read(dap, AP_REG_CSW, &csw);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; continue;
retval = dap_queue_ap_read(dap, AP_REG_CSW, &csw); retval = dap_queue_ap_read(dap, AP_REG_CFG, &cfg);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; continue;
retval = dap_queue_ap_read(dap, AP_REG_CFG, &cfg); retval = dap_run(dap);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; continue;
break;
}
retval = dap_run(dap);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;

11
src/target/cortex_m.c
View File

@ -1107,6 +1107,17 @@ static int cortex_m_deassert_reset(struct target *target)
/* deassert reset lines */ /* deassert reset lines */
adapter_deassert_reset(); adapter_deassert_reset();
enum reset_types jtag_reset_config = jtag_get_reset_config();
if ((jtag_reset_config & RESET_HAS_SRST) &&
!(jtag_reset_config & RESET_SRST_NO_GATING)) {
int retval = ahbap_debugport_init(target_to_cm(target)->armv7m.arm.dap);
if (retval != ERROR_OK) {
LOG_ERROR("DP initialisation failed");
return retval;
}
}
return ERROR_OK; return ERROR_OK;
} }