From bc9df17e424887f37ae3d785c2e8faf4b70f0df2 Mon Sep 17 00:00:00 2001
From: oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60>
Date: Sun, 21 Jun 2009 21:06:23 +0000
Subject: [PATCH] Paulius Zaleckas <paulius.zaleckas@gmail.com> Add config for
 CS351x CPUs

git-svn-id: svn://svn.berlios.de/openocd/trunk@2349 b42882b7-edfa-0310-969c-e2dbd0fdcd60
---
 tcl/target/cs351x.cfg | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)
 create mode 100644 tcl/target/cs351x.cfg

diff --git a/tcl/target/cs351x.cfg b/tcl/target/cs351x.cfg
new file mode 100644
index 000000000..51631d36c
--- /dev/null
+++ b/tcl/target/cs351x.cfg
@@ -0,0 +1,30 @@
+if { [info exists CHIPNAME] } {	
+   set  _CHIPNAME $CHIPNAME    
+} else {	 
+   set  _CHIPNAME cs351x
+}
+
+if { [info exists ENDIAN] } {	
+   set  _ENDIAN $ENDIAN    
+} else {	 
+   set  _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x00526fa1
+}
+
+jtag newtap $_CHIPNAME cpu  -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+# Create the GDB Target.
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME -variant fa526
+# There is 16K of SRAM on this chip
+# FIXME: flash programming is not working by using this work area. So comment this out for now.
+#$_TARGETNAME configure -work-area-virt 0x00000000 -work-area-phys 0x00000000 -work-area-size  0x4000 -work-area-backup 1
+
+# This chip has a DCC ... use it
+arm7_9 dcc_downloads enable
+