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aarch64: allow reading TTBR register when halted in EL0 

There's no access to TTBR in EL0. Circumvent by moving the PE to EL1
before reading, and switch back to original mode afterwards.

Change-Id: I22891b958d3d7e6fad1cb27183c192d975d63d89
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
gitignore-build
Matthias Welwarsky 2016-10-20 14:46:11 +02:00
parent 05bf20d05a
commit ba82230856
1 changed files with 3 additions and 0 deletions
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3
src/target/armv8.c
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@ -737,6 +737,8 @@ static __unused int armv8_read_ttbcr(struct target *target)
armv8->page_size = (ttbcr >> 14) & 3; armv8->page_size = (ttbcr >> 14) & 3;
break; break;
case SYSTEM_CUREL_EL0: case SYSTEM_CUREL_EL0:
armv8_dpm_modeswitch(dpm, ARMV8_64_EL1H);
/* fall through */
case SYSTEM_CUREL_EL1: case SYSTEM_CUREL_EL1:
retval = dpm->instr_read_data_r0_64(dpm, retval = dpm->instr_read_data_r0_64(dpm,
ARMV8_MRS(SYSTEM_TCR_EL1, 0), ARMV8_MRS(SYSTEM_TCR_EL1, 0),
@ -764,6 +766,7 @@ static __unused int armv8_read_ttbcr(struct target *target)
LOG_INFO("TTBR0 access above %" PRIx64, (uint64_t)(armv8->armv8_mmu.ttbr0_mask)); LOG_INFO("TTBR0 access above %" PRIx64, (uint64_t)(armv8->armv8_mmu.ttbr0_mask));
done: done:
armv8_dpm_modeswitch(dpm, ARM_MODE_ANY);
dpm->finish(dpm); dpm->finish(dpm);
return retval; return retval;
} }