dsp5680xx - error codes
added logging of target error codes to enable automatic error handling from tcl. the plan is to use a computer to execute a series of tcl commands, the changes allow simple parsing of return messages to detect errors. Change-Id: Ia98d3bd036e1b6065b475ffff6c1d30baeaf7417 Signed-off-by: Rodrigo L. Rosa <rodrigorosa.lg@gmail.com> Reviewed-on: http://openocd.zylin.com/215 Tested-by: jenkins Tested-by: Øyvind Harboe <oyvindharboe@gmail.com> Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>__archive__
parent
b462316699
commit
b9346fbd64
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@ -30,14 +30,13 @@
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struct dsp5680xx_common dsp5680xx_context;
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#define err_check(retval,err_msg) if(retval != ERROR_OK){LOG_ERROR("%s: %d %s.",__FUNCTION__,__LINE__,err_msg);return retval;}
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#define err_check_propagate(retval) if(retval!=ERROR_OK){return retval;}
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#define _E "DSP5680XX_ERROR:%d\nAt:%s:%d:%s"
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#define err_check(r, c, m) if (r != ERROR_OK) {LOG_ERROR(_E, c, __func__, __LINE__, m); return r; }
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#define err_check_propagate(retval) if (retval != ERROR_OK) return retval;
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int dsp5680xx_execute_queue(void){
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int retval;
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retval = jtag_execute_queue();
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err_check_propagate(retval);
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return retval;
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}
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@ -55,11 +54,11 @@ static int dsp5680xx_drscan(struct target * target, uint8_t * data_to_shift_into
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int retval = ERROR_OK;
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if (NULL == target->tap){
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retval = ERROR_FAIL;
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err_check(retval,"Invalid tap");
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err_check(retval, DSP5680XX_ERROR_JTAG_INVALID_TAP, "Invalid tap");
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}
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if (len > 32){
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retval = ERROR_FAIL;
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err_check(retval,"dr_len overflow, maxium is 32");
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err_check(retval, DSP5680XX_ERROR_JTAG_DR_LEN_OVERFLOW, "dr_len overflow, maxium is 32");
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}
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//TODO what values of len are valid for jtag_add_plain_dr_scan?
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//can i send as many bits as i want?
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@ -67,7 +66,7 @@ static int dsp5680xx_drscan(struct target * target, uint8_t * data_to_shift_into
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jtag_add_plain_dr_scan(len,data_to_shift_into_dr,data_shifted_out_of_dr, TAP_IDLE);
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if(dsp5680xx_context.flush){
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retval = dsp5680xx_execute_queue();
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err_check_propagate(retval);
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err_check(retval, DSP5680XX_ERROR_JTAG_DRSCAN, "drscan failed!");
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}
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if(data_shifted_out_of_dr!=NULL){
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LOG_DEBUG("Data read (%d bits): 0x%04X",len,*data_shifted_out_of_dr);
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@ -76,37 +75,41 @@ static int dsp5680xx_drscan(struct target * target, uint8_t * data_to_shift_into
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return retval;
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}
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static int dsp5680xx_irscan(struct target * target, uint32_t * data_to_shift_into_ir, uint32_t * data_shifted_out_of_ir, uint8_t ir_len){
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// -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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// Inputs:
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// - data_to_shift_into_ir: This is the data that will be shifted into the JTAG IR reg.
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// - data_shifted_out_of_ir: The data that will be shifted out of the JTAG IR reg will stored here
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// - len: Length of the data to be shifted to JTAG IR.
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//
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// -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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int retval = ERROR_OK;
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if (NULL == target->tap){
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retval = ERROR_FAIL;
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err_check(retval,"Invalid tap");
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}
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if (ir_len != target->tap->ir_length){
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if(target->tap->enabled){
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retval = ERROR_FAIL;
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err_check(retval,"Invalid irlen");
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}else{
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struct jtag_tap * master_tap = jtag_tap_by_string("dsp568013.chp");
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if((master_tap == NULL) || ((master_tap->enabled) && (ir_len != DSP5680XX_JTAG_MASTER_TAP_IRLEN))){
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retval = ERROR_FAIL;
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err_check(retval,"Invalid irlen");
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}
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}
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}
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jtag_add_plain_ir_scan(ir_len,(uint8_t *)data_to_shift_into_ir,(uint8_t *)data_shifted_out_of_ir, TAP_IDLE);
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if(dsp5680xx_context.flush){
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retval = dsp5680xx_execute_queue();
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err_check_propagate(retval);
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}
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return retval;
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/** -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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* Inputs:
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* - data_to_shift_into_ir: This is the data that will be shifted into the JTAG IR reg.
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* - data_shifted_out_of_ir: The data that will be shifted out of the JTAG IR reg will be
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* stored here
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* - len: Length of the data to be shifted to JTAG IR.
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*
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* -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
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*/
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static int dsp5680xx_irscan(struct target *target, uint32_t *d_in, uint32_t *d_out, uint8_t ir_len)
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{
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int retval = ERROR_OK;
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uint16_t tap_ir_len = DSP5680XX_JTAG_MASTER_TAP_IRLEN;
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if (NULL == target->tap) {
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retval = ERROR_FAIL;
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err_check(retval, DSP5680XX_ERROR_JTAG_INVALID_TAP, "Invalid tap");
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}
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if (ir_len != target->tap->ir_length) {
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if (target->tap->enabled) {
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retval = ERROR_FAIL;
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err_check(retval, DSP5680XX_ERROR_INVALID_IR_LEN, "Invalid irlen");
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} else {
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struct jtag_tap *t = jtag_tap_by_string("dsp568013.chp");
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if ((t == NULL) || ((t->enabled) && (ir_len != tap_ir_len))) {
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retval = ERROR_FAIL;
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err_check(retval, DSP5680XX_ERROR_INVALID_IR_LEN, "Invalid irlen");
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}
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}
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}
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jtag_add_plain_ir_scan(ir_len, (uint8_t *)d_in, (uint8_t *)d_out, TAP_IDLE);
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if (dsp5680xx_context.flush) {
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retval = dsp5680xx_execute_queue();
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err_check(retval, DSP5680XX_ERROR_JTAG_IRSCAN, "irscan failed!");
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}
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return retval;
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}
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static int dsp5680xx_jtag_status(struct target *target, uint8_t * status){
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@ -457,15 +460,15 @@ static int switch_tap(struct target * target, struct jtag_tap * master_tap,struc
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if(master_tap == NULL){
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master_tap = jtag_tap_by_string("dsp568013.chp");
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if(master_tap == NULL){
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retval = ERROR_FAIL;
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err_check(retval,"Failed to get master tap.");
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retval = ERROR_FAIL;
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err_check(retval, DSP5680XX_ERROR_JTAG_TAP_FIND_MASTER, "Failed to get master tap.");
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}
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}
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if(core_tap == NULL){
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core_tap = jtag_tap_by_string("dsp568013.cpu");
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if(core_tap == NULL){
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retval = ERROR_FAIL;
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err_check(retval,"Failed to get core tap.");
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retval = ERROR_FAIL;
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err_check(retval, DSP5680XX_ERROR_JTAG_TAP_FIND_CORE, "Failed to get core tap.");
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}
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}
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@ -534,7 +537,10 @@ static int eonce_enter_debug_mode_without_reset(struct target * target, uint16_t
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retval = ERROR_OK;
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}else{
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retval = ERROR_TARGET_FAILURE;
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err_check(retval,"Failed to set EOnCE module to debug mode. Try with halt");
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/**
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* No error msg here, since there is still hope with full halting sequence
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*/
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err_check_propagate(retval);
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}
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if(eonce_status!=NULL)
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*eonce_status = data_read_from_dr;
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@ -567,12 +573,12 @@ static int eonce_enter_debug_mode(struct target * target, uint16_t * eonce_statu
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tap_chp = jtag_tap_by_string("dsp568013.chp");
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if(tap_chp == NULL){
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retval = ERROR_FAIL;
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err_check(retval,"Failed to get master tap.");
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err_check(retval, DSP5680XX_ERROR_JTAG_TAP_FIND_MASTER, "Failed to get master tap.");
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}
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tap_cpu = jtag_tap_by_string("dsp568013.cpu");
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if(tap_cpu == NULL){
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retval = ERROR_FAIL;
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err_check(retval,"Failed to get master tap.");
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err_check(retval, DSP5680XX_ERROR_JTAG_TAP_FIND_CORE, "Failed to get master tap.");
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}
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// Enable master tap
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@ -637,8 +643,9 @@ static int eonce_enter_debug_mode(struct target * target, uint16_t * eonce_statu
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target->state = TARGET_HALTED;
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retval = ERROR_OK;
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}else{
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LOG_DEBUG("Failed to set EOnCE module to debug mode.");
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const char *msg = "Failed to set EOnCE module to debug mode";
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retval = ERROR_TARGET_FAILURE;
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err_check(retval, DSP5680XX_ERROR_ENTER_DEBUG_MODE, msg);
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}
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if(eonce_status!=NULL)
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*eonce_status = data_read_from_dr;
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@ -711,7 +718,7 @@ static int dsp5680xx_halt(struct target *target){
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return ERROR_OK;
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}
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retval = eonce_enter_debug_mode(target,&eonce_status);
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err_check(retval,"Failed to halt target.");
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err_check_propagate(retval);
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retval = eonce_pc_store(target);
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err_check_propagate(retval);
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//TODO is it useful to store the pc?
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@ -797,7 +804,7 @@ static int dsp5680xx_resume(struct target *target, int current, uint32_t address
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}
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if(retry == 0){
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retval = ERROR_TARGET_FAILURE;
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err_check(retval,"Failed to resume...");
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err_check(retval, DSP5680XX_ERROR_RESUME, "Failed to resume...");
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}else{
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target->state = TARGET_RUNNING;
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}
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@ -1010,7 +1017,7 @@ static int dsp5680xx_write_16(struct target * target, uint32_t address, uint32_t
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int retval = ERROR_OK;
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if(target->state != TARGET_HALTED){
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retval = ERROR_TARGET_NOT_HALTED;
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err_check(retval,"Target must be halted.");
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err_check(retval, DSP5680XX_ERROR_WRITE_WITH_TARGET_RUNNING, "Target must be halted.");
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};
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uint32_t iter;
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int counter = FLUSH_COUNT_READ_WRITE;
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@ -1036,7 +1043,7 @@ static int dsp5680xx_write_32(struct target * target, uint32_t address, uint32_t
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int retval = ERROR_OK;
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if(target->state != TARGET_HALTED){
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retval = ERROR_TARGET_NOT_HALTED;
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err_check(retval,"Target must be halted.");
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err_check(retval, DSP5680XX_ERROR_WRITE_WITH_TARGET_RUNNING, "Target must be halted.");
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};
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uint32_t iter;
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int counter = FLUSH_COUNT_READ_WRITE;
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@ -1073,8 +1080,7 @@ static int dsp5680xx_write_32(struct target * target, uint32_t address, uint32_t
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static int dsp5680xx_write(struct target *target, uint32_t address, uint32_t size, uint32_t count, const uint8_t * buffer){
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//TODO Cannot write 32bit to odd address, will write 0x12345678 as 0x5678 0x0012
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if(target->state != TARGET_HALTED){
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LOG_USER("Target must be halted.");
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return ERROR_OK;
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err_check(ERROR_FAIL, DSP5680XX_ERROR_WRITE_WITH_TARGET_RUNNING, "Target must be halted.");
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}
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int retval = 0;
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int p_mem = 1;
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@ -1093,7 +1099,7 @@ static int dsp5680xx_write(struct target *target, uint32_t address, uint32_t siz
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break;
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default:
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retval = ERROR_TARGET_DATA_ABORT;
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err_check(retval,"Invalid data size.");
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err_check(retval, DSP5680XX_ERROR_INVALID_DATA_SIZE_UNIT, "Invalid data size.");
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break;
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}
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return retval;
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@ -1216,7 +1222,8 @@ int dsp5680xx_f_protect_check(struct target * target, uint16_t * protected) {
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err_check_propagate(retval);
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}
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if(protected == NULL){
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err_check(ERROR_FAIL,"NULL pointer not valid.");
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const char *msg = "NULL pointer not valid.";
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err_check(ERROR_FAIL, DSP5680XX_ERROR_PROTECT_CHECK_INVALID_ARGS, msg);
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}
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retval = dsp5680xx_read_16_single(target,HFM_BASE_ADDR|HFM_PROT,(uint8_t *)protected,0);
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err_check_propagate(retval);
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@ -1252,7 +1259,8 @@ static int dsp5680xx_f_execute_command(struct target * target, uint16_t command,
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err_check_propagate(retval);
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if((watchdog--)==1){
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retval = ERROR_TARGET_FAILURE;
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err_check(retval,"FM execute command failed.");
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const char *msg = "Timed out waiting for FM to finish old command.";
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err_check(retval, DSP5680XX_ERROR_FM_BUSY, msg);
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}
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}while (!(i[0]&0x40)); // wait until current command is complete
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@ -1300,13 +1308,14 @@ static int dsp5680xx_f_execute_command(struct target * target, uint16_t command,
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err_check_propagate(retval);
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if((watchdog--)==1){
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retval = ERROR_TARGET_FAILURE;
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err_check(retval,"FM execution did not finish.");
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err_check(retval, DSP5680XX_ERROR_FM_CMD_TIMED_OUT, "FM execution did not finish.");
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}
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}while (!(i[0]&0x40)); // wait until the command is complete
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*hfm_ustat = ((i[0]<<8)|(i[1]));
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if (i[0]&HFM_USTAT_MASK_PVIOL_ACCER){
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retval = ERROR_TARGET_FAILURE;
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err_check(retval,"pviol and/or accer bits set. HFM command execution error");
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retval = ERROR_TARGET_FAILURE;
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const char *msg = "pviol and/or accer bits set. HFM command execution error";
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err_check(retval, DSP5680XX_ERROR_FM_EXEC, msg);
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}
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return ERROR_OK;
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}
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err_check_propagate(retval);
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if (i[0]!=(0x80|(HFM_CLK_DEFAULT&0x7f))) {
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retval = ERROR_TARGET_FAILURE;
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err_check(retval,"Unable to set HFM CLK divisor.");
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err_check(retval, DSP5680XX_ERROR_FM_SET_CLK, "Unable to set HFM CLK divisor.");
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}
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if(hfm_at_wrong_value)
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LOG_DEBUG("HFM CLK divisor set to 0x%02x.",i[0]&0x7f);
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@ -1551,7 +1560,8 @@ int dsp5680xx_f_wr(struct target * target, uint8_t *buffer, uint32_t address, ui
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if(count%2){
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//TODO implement handling of odd number of words.
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retval = ERROR_FAIL;
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err_check(retval,"Cannot handle odd number of words.");
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const char *msg = "Cannot handle odd number of words.";
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err_check(retval, DSP5680XX_ERROR_FLASHING_INVALID_WORD_COUNT, msg);
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}
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dsp5680xx_context.flush = 1;
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@ -1593,8 +1603,9 @@ int dsp5680xx_f_wr(struct target * target, uint8_t *buffer, uint32_t address, ui
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err_check_propagate(retval);
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pc_crc = perl_crc(buffer,i);
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if(pc_crc != signature){
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retval = ERROR_FAIL;
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err_check(retval,"Flashed data failed CRC check, flash again!");
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retval = ERROR_FAIL;
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const char *msg = "Flashed data failed CRC check, flash again!";
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err_check(retval, DSP5680XX_ERROR_FLASHING_CRC, msg);
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}
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}
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return retval;
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@ -1626,13 +1637,13 @@ int dsp5680xx_f_unlock(struct target * target){
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struct jtag_tap * tap_cpu;
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tap_chp = jtag_tap_by_string("dsp568013.chp");
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if(tap_chp == NULL){
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retval = ERROR_FAIL;
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err_check(retval,"Failed to get master tap.");
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retval = ERROR_FAIL;
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err_check(retval, DSP5680XX_ERROR_JTAG_TAP_ENABLE_MASTER, "Failed to get master tap.");
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}
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tap_cpu = jtag_tap_by_string("dsp568013.cpu");
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if(tap_cpu == NULL){
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retval = ERROR_FAIL;
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err_check(retval,"Failed to get master tap.");
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err_check(retval, DSP5680XX_ERROR_JTAG_TAP_ENABLE_CORE, "Failed to get master tap.");
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}
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retval = eonce_enter_debug_mode(target,&eonce_status);
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@ -1644,7 +1655,7 @@ int dsp5680xx_f_unlock(struct target * target){
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jtag_add_sleep(TIME_DIV_FREESCALE*200*1000);
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retval = reset_jtag();
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err_check(retval,"Failed to reset JTAG state machine");
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err_check(retval, DSP5680XX_ERROR_JTAG_RESET, "Failed to reset JTAG state machine");
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jtag_add_sleep(150);
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// Enable core tap
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@ -1678,7 +1689,7 @@ int dsp5680xx_f_unlock(struct target * target){
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jtag_add_sleep(TIME_DIV_FREESCALE*200*1000);
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retval = reset_jtag();
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err_check(retval,"Failed to reset JTAG state machine");
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err_check(retval, DSP5680XX_ERROR_JTAG_RESET, "Failed to reset JTAG state machine");
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jtag_add_sleep(150);
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instr = 0x0606ffff;
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@ -1725,7 +1736,7 @@ int dsp5680xx_f_lock(struct target * target){
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jtag_add_sleep(TIME_DIV_FREESCALE*200*1000);
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retval = reset_jtag();
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err_check(retval,"Failed to reset JTAG state machine");
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err_check(retval, DSP5680XX_ERROR_JTAG_RESET, "Failed to reset JTAG state machine");
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jtag_add_sleep(TIME_DIV_FREESCALE*100*1000);
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jtag_add_reset(0,0);
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jtag_add_sleep(TIME_DIV_FREESCALE*300*1000);
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@ -1734,7 +1745,7 @@ int dsp5680xx_f_lock(struct target * target){
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}
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static int dsp5680xx_step(struct target * target,int current, uint32_t address, int handle_breakpoints){
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err_check(ERROR_FAIL,"Not implemented yet.");
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err_check(ERROR_FAIL, DSP5680XX_ERROR_NOT_IMPLEMENTED_STEP, "Not implemented yet.");
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}
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/** Holds methods for dsp5680xx targets. */
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@ -213,6 +213,40 @@
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#define SIM_CMD_RESET 0x10
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//----------------------------------------------------------------
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/**
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* ----------------------------------------------------------------
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||||
* ERROR codes - enable automatic parsing of output
|
||||
* ----------------------------------------------------------------
|
||||
*/
|
||||
#define DSP5680XX_ERROR_UNKNOWN_OR_ERROR_OPENOCD -100
|
||||
#define DSP5680XX_ERROR_JTAG_COMM -1
|
||||
#define DSP5680XX_ERROR_JTAG_RESET -2
|
||||
#define DSP5680XX_ERROR_JTAG_INVALID_TAP -3
|
||||
#define DSP5680XX_ERROR_JTAG_DR_LEN_OVERFLOW -4
|
||||
#define DSP5680XX_ERROR_INVALID_IR_LEN -5
|
||||
#define DSP5680XX_ERROR_JTAG_TAP_ENABLE_MASTER -6
|
||||
#define DSP5680XX_ERROR_JTAG_TAP_ENABLE_CORE -7
|
||||
#define DSP5680XX_ERROR_JTAG_TAP_FIND_MASTER -8
|
||||
#define DSP5680XX_ERROR_JTAG_TAP_FIND_CORE -9
|
||||
#define DSP5680XX_ERROR_JTAG_DRSCAN -10
|
||||
#define DSP5680XX_ERROR_JTAG_IRSCAN -11
|
||||
#define DSP5680XX_ERROR_ENTER_DEBUG_MODE -12
|
||||
#define DSP5680XX_ERROR_RESUME -13
|
||||
#define DSP5680XX_ERROR_WRITE_WITH_TARGET_RUNNING -14
|
||||
#define DSP5680XX_ERROR_INVALID_DATA_SIZE_UNIT -15
|
||||
#define DSP5680XX_ERROR_PROTECT_CHECK_INVALID_ARGS -16
|
||||
#define DSP5680XX_ERROR_FM_BUSY -17
|
||||
#define DSP5680XX_ERROR_FM_CMD_TIMED_OUT -18
|
||||
#define DSP5680XX_ERROR_FM_EXEC -19
|
||||
#define DSP5680XX_ERROR_FM_SET_CLK -20
|
||||
#define DSP5680XX_ERROR_FLASHING_INVALID_WORD_COUNT -21
|
||||
#define DSP5680XX_ERROR_FLASHING_CRC -22
|
||||
#define DSP5680XX_ERROR_FLASHING -23
|
||||
#define DSP5680XX_ERROR_NOT_IMPLEMENTED_STEP -24
|
||||
/**
|
||||
* ----------------------------------------------------------------
|
||||
*/
|
||||
|
||||
struct dsp5680xx_common{
|
||||
//TODO
|
||||
uint32_t stored_pc;
|
||||
|
|
Loading…
Reference in New Issue