Updates for "reset_config":
- revert to previous default: don't talk JTAG during SRST - add "srst_nogates" flag, the converse of "srst_gates_jtag" - with no args, display the current configuration And update the User's Guide text with bullet lists to be a bit more clear. git-svn-id: svn://svn.berlios.de/openocd/trunk@2818 b42882b7-edfa-0310-969c-e2dbd0fdcd60__archive__
dbrownell
parent
dc871f422d
commit
b83d79a42f
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@ -2099,7 +2099,7 @@ nTRST (active-low JTAG TAP reset) before starting new JTAG operations.
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@end deffn
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@deffn {Command} reset_config mode_flag ...
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This command tells OpenOCD the reset configuration
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This command displays or modifies the reset configuration
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of your combination of JTAG board and target in target
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configuration scripts.
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@ -2113,7 +2113,9 @@ from a particular combination of interface and board.
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with a board that only wires up SRST.)
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The @var{mode_flag} options can be specified in any order, but only one
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of each type -- @var{signals}, @var{combination}, @var{trst_type},
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of each type -- @var{signals}, @var{combination},
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@var{gates},
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@var{trst_type},
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and @var{srst_type} -- may be specified at a time.
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If you don't provide a new value for a given type, its previous
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value (perhaps the default) is unchanged.
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@ -2121,6 +2123,8 @@ For example, this means that you don't need to say anything at all about
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TRST just to declare that if the JTAG adapter should want to drive SRST,
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it must explicitly be driven high (@option{srst_push_pull}).
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@itemize
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@item
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@var{signals} can specify which of the reset signals are connected.
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For example, If the JTAG interface provides SRST, but the board doesn't
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connect that signal properly, then OpenOCD can't use it.
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@ -2128,10 +2132,11 @@ Possible values are @option{none} (the default), @option{trst_only},
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@option{srst_only} and @option{trst_and_srst}.
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@quotation Tip
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If your board provides SRST or TRST through the JTAG connector,
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If your board provides SRST and/or TRST through the JTAG connector,
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you must declare that or else those signals will not be used.
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@end quotation
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@item
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The @var{combination} is an optional value specifying broken reset
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signal implementations.
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The default behaviour if no option given is @option{separate},
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@ -2144,9 +2149,16 @@ haven't seen hardware with such a bug, and can be worked around).
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@option{combined} implies both @option{srst_pulls_trst} and
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@option{trst_pulls_srst}.
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@option{srst_gates_jtag} indicates that asserting SRST gates the
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@item
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The @var{gates} tokens control flags that describe some cases where
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JTAG may be unvailable during reset.
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@option{srst_gates_jtag} (default)
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indicates that asserting SRST gates the
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JTAG clock. This means that no communication can happen on JTAG
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while SRST is asserted.
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Its converse is @option{srst_nogate}, indicating that JTAG commands
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can safely be issued while SRST is active.
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@end itemize
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The optional @var{trst_type} and @var{srst_type} parameters allow the
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driver mode of each reset line to be specified. These values only affect
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@ -2154,16 +2166,20 @@ JTAG interfaces with support for different driver modes, like the Amontec
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JTAGkey and JTAG Accelerator. Also, they are necessarily ignored if the
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relevant signal (TRST or SRST) is not connected.
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@itemize
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@item
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Possible @var{trst_type} driver modes for the test reset signal (TRST)
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are @option{trst_push_pull} (default) and @option{trst_open_drain}.
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are the default @option{trst_push_pull}, and @option{trst_open_drain}.
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Most boards connect this signal to a pulldown, so the JTAG TAPs
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never leave reset unless they are hooked up to a JTAG adapter.
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@item
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Possible @var{srst_type} driver modes for the system reset signal (SRST)
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are the default @option{srst_open_drain}, and @option{srst_push_pull}.
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Most boards connect this signal to a pullup, and allow the
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signal to be pulled low by various events including system
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powerup and pressing a reset button.
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@end itemize
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@end deffn
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@ -286,7 +286,7 @@ enum reset_types {
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RESET_TRST_PULLS_SRST = 0x8,
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RESET_TRST_OPEN_DRAIN = 0x10,
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RESET_SRST_PUSH_PULL = 0x20,
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RESET_SRST_GATES_JTAG = 0x40,
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RESET_SRST_NO_GATING = 0x40,
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};
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enum reset_types jtag_get_reset_config(void);
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101
src/jtag/tcl.c
101
src/jtag/tcl.c
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@ -631,7 +631,12 @@ int jtag_register_commands(struct command_context_s *cmd_ctx)
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COMMAND_CONFIG, "(DEPRECATED) jtag_device <ir_length> <ir_expected> <ir_mask>");
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register_command(cmd_ctx, NULL, "reset_config", handle_reset_config_command,
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COMMAND_ANY,
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"[none/trst_only/srst_only/trst_and_srst] [srst_pulls_trst/trst_pulls_srst] [combined/separate] [trst_push_pull/trst_open_drain] [srst_push_pull/srst_open_drain]");
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"reset_config "
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"[none|trst_only|srst_only|trst_and_srst] "
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"[srst_pulls_trst|trst_pulls_srst|combined|separate] "
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"[srst_gates_jtag|srst_nogate] "
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"[trst_push_pull|trst_open_drain] "
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"[srst_push_pull|srst_open_drain]");
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register_command(cmd_ctx, NULL, "jtag_nsrst_delay", handle_jtag_nsrst_delay_command,
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COMMAND_ANY, "jtag_nsrst_delay <ms> - delay after deasserting srst in ms");
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register_command(cmd_ctx, NULL, "jtag_ntrst_delay", handle_jtag_ntrst_delay_command,
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@ -851,9 +856,6 @@ static int handle_reset_config_command(struct command_context_s *cmd_ctx, char *
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int new_cfg = 0;
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int mask = 0;
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if (argc < 1)
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return ERROR_COMMAND_SYNTAX_ERROR;
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/* Original versions cared about the order of these tokens:
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* reset_config signals [combination [trst_type [srst_type]]]
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* They also clobbered the previous configuration even on error.
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@ -865,13 +867,21 @@ static int handle_reset_config_command(struct command_context_s *cmd_ctx, char *
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int tmp = 0;
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int m;
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m = RESET_SRST_GATES_JTAG;
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tmp = 0;
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/* gating */
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m = RESET_SRST_NO_GATING;
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if (strcmp(*args, "srst_gates_jtag") == 0)
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{
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tmp = RESET_SRST_GATES_JTAG;
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goto next;
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/* default: don't use JTAG while SRST asserted */;
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else if (strcmp(*args, "srst_nogate") == 0)
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tmp = RESET_SRST_NO_GATING;
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else
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m = 0;
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if (mask & m) {
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LOG_ERROR("extra reset_config %s spec (%s)",
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"gating", *args);
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return ERROR_INVALID_ARGUMENTS;
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}
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if (m)
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goto next;
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/* signals */
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m = RESET_HAS_TRST | RESET_HAS_SRST;
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@ -958,10 +968,81 @@ next:
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}
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/* clear previous values of those bits, save new values */
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enum reset_types old_cfg = jtag_get_reset_config();
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if (mask) {
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int old_cfg = jtag_get_reset_config();
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old_cfg &= ~mask;
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new_cfg |= old_cfg;
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jtag_set_reset_config(new_cfg);
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} else
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new_cfg = jtag_get_reset_config();
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/*
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* Display the (now-)current reset mode
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*/
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char *modes[5];
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/* minimal JTAG has neither SRST nor TRST (so that's the default) */
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switch (new_cfg & (RESET_HAS_TRST | RESET_HAS_SRST)) {
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case RESET_HAS_SRST:
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modes[0] = "srst_only";
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break;
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case RESET_HAS_TRST:
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modes[0] = "trst_only";
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break;
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case RESET_TRST_AND_SRST:
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modes[0] = "trst_and_srst";
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break;
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default:
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modes[0] = "none";
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break;
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}
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/* normally SRST and TRST are decoupled; but bugs happen ... */
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switch (new_cfg & (RESET_SRST_PULLS_TRST | RESET_TRST_PULLS_SRST)) {
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case RESET_SRST_PULLS_TRST:
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modes[1] = "srst_pulls_trst";
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break;
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case RESET_TRST_PULLS_SRST:
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modes[1] = "trst_pulls_srst";
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break;
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case RESET_SRST_PULLS_TRST | RESET_TRST_PULLS_SRST:
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modes[1] = "combined";
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break;
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default:
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modes[1] = "separate";
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break;
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}
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/* TRST-less connectors include Altera, Xilinx, and minimal JTAG */
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if (new_cfg & RESET_HAS_TRST) {
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if (new_cfg & RESET_TRST_OPEN_DRAIN)
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modes[3] = " trst_open_drain";
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else
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modes[3] = " trst_push_pull";
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} else
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modes[3] = "";
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/* SRST-less connectors include TI-14, Xilinx, and minimal JTAG */
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if (new_cfg & RESET_HAS_SRST) {
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if (new_cfg & RESET_SRST_NO_GATING)
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modes[2] = " srst_nogate";
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else
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modes[2] = " srst_gates_jtag";
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if (new_cfg & RESET_SRST_PUSH_PULL)
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modes[4] = " srst_push_pull";
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else
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modes[4] = " srst_open_drain";
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} else {
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modes[2] = "";
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modes[4] = "";
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}
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command_print(cmd_ctx, "%s %s%s%s%s",
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modes[0], modes[1],
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modes[2], modes[3], modes[4]);
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return ERROR_OK;
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}
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@ -1021,12 +1021,19 @@ int arm7_9_assert_reset(target_t *target)
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return ERROR_FAIL;
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}
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/* at this point trst has been asserted/deasserted once. We want to
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* program embedded ice while SRST is asserted, but some CPUs gate
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* the JTAG clock while SRST is asserted
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/* At this point trst has been asserted/deasserted once. We would
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* like to program EmbeddedICE while SRST is asserted, instead of
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* depending on SRST to leave that module alone. However, many CPUs
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* gate the JTAG clock while SRST is asserted; or JTAG may need
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* clock stability guarantees (adaptive clocking might help).
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*
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* So we assume JTAG access during SRST is off the menu unless it's
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* been specifically enabled.
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*/
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bool srst_asserted = false;
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if (((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0) && ((jtag_reset_config & RESET_SRST_GATES_JTAG) == 0))
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if (((jtag_reset_config & RESET_SRST_PULLS_TRST) == 0)
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&& (jtag_reset_config & RESET_SRST_NO_GATING))
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{
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jtag_add_reset(0, 1);
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srst_asserted = true;
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Reference in New Issue