rename jtag_nsrst_delay as adapter_nsrst_delay
Globally rename "jtag_nsrst_delay" as "adapter_nsrst_delay", and move it out of the "jtag" command group ... it needs to be used with non-JTAG transports Includes a migration aid (in jtag/startup.tcl) so that old user scripts won't break. That aid should Sunset in about a year. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>__archive__
parent
96f9790279
commit
b559b273b5
1
NEWS
1
NEWS
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@ -10,6 +10,7 @@ JTAG Layer:
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convert your scripts to the new names, since those procedures
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convert your scripts to the new names, since those procedures
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will not be around forever.
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will not be around forever.
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jtag_khz ... is now adapter_khz
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jtag_khz ... is now adapter_khz
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jtag_nsrst_delay ... is now adapter_nsrst_delay
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Boundary Scan:
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Boundary Scan:
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@ -2603,7 +2603,7 @@ stops issuing the reset. For example, there may be chip or board
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requirements that all reset pulses last for at least a
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requirements that all reset pulses last for at least a
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certain amount of time; and reset buttons commonly have
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certain amount of time; and reset buttons commonly have
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hardware debouncing.
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hardware debouncing.
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Use the @command{jtag_nsrst_delay} and @command{jtag_ntrst_delay}
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Use the @command{adapter_nsrst_delay} and @command{jtag_ntrst_delay}
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commands to say when extra delays are needed.
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commands to say when extra delays are needed.
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@item @emph{Drive type} ... Reset lines often have a pullup
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@item @emph{Drive type} ... Reset lines often have a pullup
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@ -2649,7 +2649,7 @@ after asserting nSRST (active-low system reset) before
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allowing it to be deasserted.
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allowing it to be deasserted.
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@end deffn
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@end deffn
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@deffn {Command} jtag_nsrst_delay milliseconds
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@deffn {Command} adapter_nsrst_delay milliseconds
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How long (in milliseconds) OpenOCD should wait after deasserting
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How long (in milliseconds) OpenOCD should wait after deasserting
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nSRST (active-low system reset) before starting new JTAG operations.
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nSRST (active-low system reset) before starting new JTAG operations.
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When a board has a reset button connected to SRST line it will
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When a board has a reset button connected to SRST line it will
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@ -93,7 +93,7 @@ static bool jtag_verify_capture_ir = true;
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static int jtag_verify = 1;
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static int jtag_verify = 1;
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/* how long the OpenOCD should wait before attempting JTAG communication after reset lines deasserted (in ms) */
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/* how long the OpenOCD should wait before attempting JTAG communication after reset lines deasserted (in ms) */
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static int jtag_nsrst_delay = 0; /* default to no nSRST delay */
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static int adapter_nsrst_delay = 0; /* default to no nSRST delay */
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static int jtag_ntrst_delay = 0; /* default to no nTRST delay */
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static int jtag_ntrst_delay = 0; /* default to no nTRST delay */
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static int jtag_nsrst_assert_width = 0; /* width of assertion */
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static int jtag_nsrst_assert_width = 0; /* width of assertion */
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static int jtag_ntrst_assert_width = 0; /* width of assertion */
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static int jtag_ntrst_assert_width = 0; /* width of assertion */
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@ -704,8 +704,8 @@ void jtag_add_reset(int req_tlr_or_trst, int req_srst)
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}
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}
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else {
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else {
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LOG_DEBUG("SRST line released");
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LOG_DEBUG("SRST line released");
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if (jtag_nsrst_delay)
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if (adapter_nsrst_delay)
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jtag_add_sleep(jtag_nsrst_delay * 1000);
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jtag_add_sleep(adapter_nsrst_delay * 1000);
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}
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}
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}
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}
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@ -1696,11 +1696,11 @@ int jtag_get_srst(void)
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void jtag_set_nsrst_delay(unsigned delay)
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void jtag_set_nsrst_delay(unsigned delay)
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{
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{
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jtag_nsrst_delay = delay;
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adapter_nsrst_delay = delay;
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}
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}
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unsigned jtag_get_nsrst_delay(void)
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unsigned jtag_get_nsrst_delay(void)
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{
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{
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return jtag_nsrst_delay;
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return adapter_nsrst_delay;
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}
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}
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void jtag_set_ntrst_delay(unsigned delay)
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void jtag_set_ntrst_delay(unsigned delay)
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{
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{
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@ -83,4 +83,5 @@ proc srst_asserted {} {
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# FIXME phase these aids out after about April 2011
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# FIXME phase these aids out after about April 2011
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#
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#
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proc jtag_khz args { eval adapter_khz $args }
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proc jtag_khz args { eval adapter_khz $args }
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proc jtag_nsrst_delay args { eval adapter_nsrst_delay $args }
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# END MIGRATION AIDS
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# END MIGRATION AIDS
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@ -1291,7 +1291,7 @@ next:
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return ERROR_OK;
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return ERROR_OK;
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}
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}
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COMMAND_HANDLER(handle_jtag_nsrst_delay_command)
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COMMAND_HANDLER(handle_adapter_nsrst_delay_command)
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{
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{
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if (CMD_ARGC > 1)
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if (CMD_ARGC > 1)
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return ERROR_COMMAND_SYNTAX_ERROR;
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return ERROR_COMMAND_SYNTAX_ERROR;
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@ -1302,7 +1302,7 @@ COMMAND_HANDLER(handle_jtag_nsrst_delay_command)
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jtag_set_nsrst_delay(delay);
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jtag_set_nsrst_delay(delay);
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}
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}
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command_print(CMD_CTX, "jtag_nsrst_delay: %u", jtag_get_nsrst_delay());
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command_print(CMD_CTX, "adapter_nsrst_delay: %u", jtag_get_nsrst_delay());
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return ERROR_OK;
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return ERROR_OK;
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}
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}
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@ -1618,6 +1618,13 @@ static const struct command_registration interface_command_handlers[] = {
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"With or without argument, display current setting.",
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"With or without argument, display current setting.",
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.usage = "[khz]",
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.usage = "[khz]",
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},
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},
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{
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.name = "adapter_nsrst_delay",
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.handler = handle_adapter_nsrst_delay_command,
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.mode = COMMAND_ANY,
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.help = "delay after deasserting srst in ms",
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.usage = "[milliseconds]",
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},
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{
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{
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.name = "interface",
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.name = "interface",
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.handler = handle_interface_command,
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.handler = handle_interface_command,
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@ -1666,13 +1673,6 @@ static const struct command_registration jtag_command_handlers[] = {
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"[trst_push_pull|trst_open_drain] "
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"[trst_push_pull|trst_open_drain] "
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"[srst_push_pull|srst_open_drain]",
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"[srst_push_pull|srst_open_drain]",
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},
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},
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{
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.name = "jtag_nsrst_delay",
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.handler = handle_jtag_nsrst_delay_command,
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.mode = COMMAND_ANY,
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.help = "delay after deasserting srst in ms",
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.usage = "[milliseconds]",
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},
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{
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{
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.name = "jtag_ntrst_delay",
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.name = "jtag_ntrst_delay",
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.handler = handle_jtag_ntrst_delay_command,
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.handler = handle_jtag_ntrst_delay_command,
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@ -32,7 +32,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
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# affected by the board and type of JTAG adapter. A value of 200 ms seems
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# affected by the board and type of JTAG adapter. A value of 200 ms seems
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# to work reliably for the configuration listed in the file header above.
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# to work reliably for the configuration listed in the file header above.
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jtag_nsrst_delay 200
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adapter_nsrst_delay 200
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jtag_ntrst_delay 200
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jtag_ntrst_delay 200
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# Set fallback clock to 1/6 of worst-case clock speed (which would be the 32.768 kHz slow clock).
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# Set fallback clock to 1/6 of worst-case clock speed (which would be the 32.768 kHz slow clock).
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@ -4,7 +4,7 @@ set CHIPNAME imote2
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source [find target/pxa270.cfg]
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source [find target/pxa270.cfg]
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# longer-than-normal reset delay
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# longer-than-normal reset delay
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jtag_nsrst_delay 800
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adapter_nsrst_delay 800
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reset_config trst_and_srst separate
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reset_config trst_and_srst separate
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@ -3,7 +3,7 @@ source [find target/imx35.cfg]
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# Determined by trial and error
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# Determined by trial and error
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reset_config trst_and_srst combined
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reset_config trst_and_srst combined
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jtag_nsrst_delay 200
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adapter_nsrst_delay 200
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jtag_ntrst_delay 200
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jtag_ntrst_delay 200
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$_TARGETNAME configure -event gdb-attach { reset init }
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$_TARGETNAME configure -event gdb-attach { reset init }
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@ -36,7 +36,7 @@ if { [info exists CPUTAPID ] } {
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set _TARGETNAME $_CHIPNAME.cpu
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set _TARGETNAME $_CHIPNAME.cpu
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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jtag_nsrst_delay 200
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adapter_nsrst_delay 200
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jtag_ntrst_delay 0
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jtag_ntrst_delay 0
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@ -16,7 +16,7 @@ source [find target/lm3s1968.cfg]
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# jtag speed
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# jtag speed
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adapter_khz 3000
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adapter_khz 3000
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jtag_nsrst_delay 100
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adapter_nsrst_delay 100
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#LM3S1968 Evaluation Board has only srst
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#LM3S1968 Evaluation Board has only srst
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reset_config srst_only
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reset_config srst_only
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@ -12,7 +12,7 @@ source [find target/lm3s811.cfg]
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# jtag speed
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# jtag speed
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adapter_khz 500
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adapter_khz 500
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jtag_nsrst_delay 100
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adapter_nsrst_delay 100
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#LM3S811 Evaluation Board has only srst
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#LM3S811 Evaluation Board has only srst
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reset_config srst_only
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reset_config srst_only
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@ -11,7 +11,7 @@ source [find target/lm3s9b9x.cfg]
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# jtag speed
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# jtag speed
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adapter_khz 500
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adapter_khz 500
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jtag_nsrst_delay 100
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adapter_nsrst_delay 100
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#LM3S9B9x Evaluation Board has only srst
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#LM3S9B9x Evaluation Board has only srst
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reset_config srst_only
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reset_config srst_only
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@ -20,7 +20,7 @@ flash bank $_FLASHNAME cfi 0x10000000 0x400000 2 2 $_TARGETNAME
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# Micrel MIC2775-29YM5 Supervisor
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# Micrel MIC2775-29YM5 Supervisor
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# Reset output will remain active for 280ms (maximum)
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# Reset output will remain active for 280ms (maximum)
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#
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#
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jtag_nsrst_delay 300
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adapter_nsrst_delay 300
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jtag_ntrst_delay 300
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jtag_ntrst_delay 300
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@ -2,7 +2,7 @@
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# http://www.hitex.com/
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# http://www.hitex.com/
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# Delays on reset lines
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# Delays on reset lines
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jtag_nsrst_delay 50
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adapter_nsrst_delay 50
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jtag_ntrst_delay 1
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jtag_ntrst_delay 1
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# Maximum of 1/8 of clock frequency (XTAL = 16 MHz).
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# Maximum of 1/8 of clock frequency (XTAL = 16 MHz).
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@ -7,7 +7,7 @@ source [find interface/hitex_str9-comstick.cfg]
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# set jtag speed
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# set jtag speed
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adapter_khz 3000
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adapter_khz 3000
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jtag_nsrst_delay 100
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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jtag_ntrst_delay 100
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#use combined on interfaces or targets that can't set TRST/SRST separately
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config trst_and_srst
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reset_config trst_and_srst
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@ -4,7 +4,7 @@
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source [find target/pxa255.cfg]
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source [find target/pxa255.cfg]
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jtag_nsrst_delay 250
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adapter_nsrst_delay 250
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jtag_ntrst_delay 250
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jtag_ntrst_delay 250
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# NOTE: until after pinmux and such are set up, only CS0 is
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# NOTE: until after pinmux and such are set up, only CS0 is
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@ -112,7 +112,7 @@ target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 1
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$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 1
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#reset configuration
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#reset configuration
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jtag_nsrst_delay 100
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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jtag_ntrst_delay 100
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reset_config trst_and_srst
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reset_config trst_and_srst
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@ -141,7 +141,7 @@ reset_config trst_and_srst
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nand device s3c2440 0
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nand device s3c2440 0
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jtag_nsrst_delay 100
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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jtag_ntrst_delay 100
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reset_config trst_and_srst
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reset_config trst_and_srst
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init
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init
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@ -1,6 +1,6 @@
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source [find target/lpc3250.cfg]
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source [find target/lpc3250.cfg]
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jtag_nsrst_delay 200
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adapter_nsrst_delay 200
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jtag_ntrst_delay 1
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jtag_ntrst_delay 1
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adapter_khz 200
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adapter_khz 200
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reset_config trst_and_srst separate
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reset_config trst_and_srst separate
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@ -93,7 +93,7 @@ $_TARGETNAME configure -event reset-init {pxa255_sst_init}
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reset_config trst_and_srst
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reset_config trst_and_srst
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jtag_nsrst_delay 200
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adapter_nsrst_delay 200
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jtag_ntrst_delay 200
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jtag_ntrst_delay 200
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#xscale debug_handler 0 0xFFFF0800 # debug handler base address
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#xscale debug_handler 0 0xFFFF0800 # debug handler base address
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@ -16,7 +16,7 @@ source [find target/c100helper.tcl]
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jtag_nsrst_assert_width 100
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jtag_nsrst_assert_width 100
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jtag_ntrst_assert_width 100
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jtag_ntrst_assert_width 100
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# don't talk to JTAG after reset for: [ms]
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# don't talk to JTAG after reset for: [ms]
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jtag_nsrst_delay 100
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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jtag_ntrst_delay 100
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reset_config trst_and_srst separate
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reset_config trst_and_srst separate
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@ -6,6 +6,6 @@
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# See calao-usb-a9260-c01.cfg and calao-usb-a9260-c02.cfg.
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# See calao-usb-a9260-c01.cfg and calao-usb-a9260-c02.cfg.
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#
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#
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jtag_nsrst_delay 200
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adapter_nsrst_delay 200
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jtag_ntrst_delay 200
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jtag_ntrst_delay 200
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@ -17,7 +17,7 @@ if { [info exists CPUTAPID] } {
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set _CPUTAPID 0x3f0f0f0f
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set _CPUTAPID 0x3f0f0f0f
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}
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}
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jtag_nsrst_delay 200
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adapter_nsrst_delay 200
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jtag_ntrst_delay 200
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jtag_ntrst_delay 200
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## JTAG scan chain
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## JTAG scan chain
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@ -1,7 +1,7 @@
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# Atheros AR71xx MIPS 24Kc SoC.
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# Atheros AR71xx MIPS 24Kc SoC.
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# tested on PB44 refererence board
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# tested on PB44 refererence board
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jtag_nsrst_delay 100
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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jtag_ntrst_delay 100
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reset_config trst_and_srst
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reset_config trst_and_srst
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@ -26,7 +26,7 @@ reset_config trst_and_srst separate trst_push_pull srst_open_drain
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#
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#
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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jtag_nsrst_delay 300
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adapter_nsrst_delay 300
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jtag_ntrst_delay 200
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jtag_ntrst_delay 200
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jtag_rclk 3
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jtag_rclk 3
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@ -30,7 +30,7 @@ if { [info exists CPUTAPID ] } {
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reset_config trst_and_srst
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reset_config trst_and_srst
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jtag_nsrst_delay 200
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adapter_nsrst_delay 200
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jtag_ntrst_delay 200
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jtag_ntrst_delay 200
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@ -26,7 +26,7 @@ reset_config trst_and_srst separate trst_push_pull srst_open_drain
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#
|
#
|
||||||
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
|
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
|
||||||
|
|
||||||
jtag_nsrst_delay 300
|
adapter_nsrst_delay 300
|
||||||
jtag_ntrst_delay 200
|
jtag_ntrst_delay 200
|
||||||
|
|
||||||
jtag_rclk 3
|
jtag_rclk 3
|
||||||
|
|
|
@ -26,6 +26,6 @@ set _TARGETNAME $_CHIPNAME.cpu
|
||||||
target create $_TARGETNAME dragonite -endian $_ENDIAN -chain-position $_TARGETNAME
|
target create $_TARGETNAME dragonite -endian $_ENDIAN -chain-position $_TARGETNAME
|
||||||
|
|
||||||
reset_config trst_and_srst
|
reset_config trst_and_srst
|
||||||
jtag_nsrst_delay 200
|
adapter_nsrst_delay 200
|
||||||
jtag_ntrst_delay 200
|
jtag_ntrst_delay 200
|
||||||
|
|
||||||
|
|
|
@ -20,7 +20,7 @@ if { [info exists CPUTAPID ] } {
|
||||||
}
|
}
|
||||||
|
|
||||||
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
|
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
|
||||||
jtag_nsrst_delay 100
|
adapter_nsrst_delay 100
|
||||||
jtag_ntrst_delay 100
|
jtag_ntrst_delay 100
|
||||||
|
|
||||||
set _TARGETNAME $_CHIPNAME.cpu
|
set _TARGETNAME $_CHIPNAME.cpu
|
||||||
|
|
|
@ -26,6 +26,6 @@ set _TARGETNAME $_CHIPNAME.cpu
|
||||||
target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME
|
target create $_TARGETNAME feroceon -endian $_ENDIAN -chain-position $_TARGETNAME
|
||||||
|
|
||||||
reset_config trst_and_srst
|
reset_config trst_and_srst
|
||||||
jtag_nsrst_delay 200
|
adapter_nsrst_delay 200
|
||||||
jtag_ntrst_delay 200
|
jtag_ntrst_delay 200
|
||||||
|
|
||||||
|
|
|
@ -3,7 +3,7 @@
|
||||||
|
|
||||||
reset_config trst_and_srst srst_gates_jtag
|
reset_config trst_and_srst srst_gates_jtag
|
||||||
|
|
||||||
jtag_nsrst_delay 5
|
adapter_nsrst_delay 5
|
||||||
|
|
||||||
if { [info exists CHIPNAME] } {
|
if { [info exists CHIPNAME] } {
|
||||||
set _CHIPNAME $CHIPNAME
|
set _CHIPNAME $CHIPNAME
|
||||||
|
|
|
@ -15,7 +15,7 @@ if { [info exists CPUTAPID ] } {
|
||||||
# jtag speed
|
# jtag speed
|
||||||
adapter_khz 500
|
adapter_khz 500
|
||||||
|
|
||||||
jtag_nsrst_delay 100
|
adapter_nsrst_delay 100
|
||||||
jtag_ntrst_delay 100
|
jtag_ntrst_delay 100
|
||||||
|
|
||||||
#LM3S6965 Evaluation Board has only srst
|
#LM3S6965 Evaluation Board has only srst
|
||||||
|
|
|
@ -25,7 +25,7 @@ if { [info exists CPUTAPID ] } {
|
||||||
}
|
}
|
||||||
|
|
||||||
#delays on reset lines
|
#delays on reset lines
|
||||||
jtag_nsrst_delay 200
|
adapter_nsrst_delay 200
|
||||||
jtag_ntrst_delay 200
|
jtag_ntrst_delay 200
|
||||||
|
|
||||||
# LPC2000 & LPC1700 -> SRST causes TRST
|
# LPC2000 & LPC1700 -> SRST causes TRST
|
||||||
|
|
|
@ -22,7 +22,7 @@ if { [info exists CPUTAPID ] } {
|
||||||
reset_config trst_and_srst srst_pulls_trst
|
reset_config trst_and_srst srst_pulls_trst
|
||||||
|
|
||||||
# reset delays
|
# reset delays
|
||||||
jtag_nsrst_delay 100
|
adapter_nsrst_delay 100
|
||||||
jtag_ntrst_delay 100
|
jtag_ntrst_delay 100
|
||||||
|
|
||||||
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
|
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
|
||||||
|
|
|
@ -24,7 +24,7 @@ if { [info exists CPUTAPID ] } {
|
||||||
reset_config trst_and_srst srst_pulls_trst
|
reset_config trst_and_srst srst_pulls_trst
|
||||||
|
|
||||||
# reset delays
|
# reset delays
|
||||||
jtag_nsrst_delay 100
|
adapter_nsrst_delay 100
|
||||||
jtag_ntrst_delay 100
|
jtag_ntrst_delay 100
|
||||||
|
|
||||||
adapter_khz 1000
|
adapter_khz 1000
|
||||||
|
|
|
@ -25,7 +25,7 @@ if { [info exists CPUTAPID ] } {
|
||||||
reset_config trst_and_srst srst_pulls_trst
|
reset_config trst_and_srst srst_pulls_trst
|
||||||
|
|
||||||
# reset delays
|
# reset delays
|
||||||
jtag_nsrst_delay 100
|
adapter_nsrst_delay 100
|
||||||
jtag_ntrst_delay 100
|
jtag_ntrst_delay 100
|
||||||
|
|
||||||
#jtag scan chain
|
#jtag scan chain
|
||||||
|
|
|
@ -21,7 +21,7 @@ if { [info exists CPUTAPID ] } {
|
||||||
set _CPUTAPID 0x4f1f0f0f
|
set _CPUTAPID 0x4f1f0f0f
|
||||||
}
|
}
|
||||||
|
|
||||||
jtag_nsrst_delay 200
|
adapter_nsrst_delay 200
|
||||||
jtag_ntrst_delay 200
|
jtag_ntrst_delay 200
|
||||||
|
|
||||||
# NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate
|
# NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate
|
||||||
|
|
|
@ -17,7 +17,7 @@ if { [info exists CPUTAPID ] } {
|
||||||
set _CPUTAPID 0xffffffff
|
set _CPUTAPID 0xffffffff
|
||||||
}
|
}
|
||||||
|
|
||||||
jtag_nsrst_delay 200
|
adapter_nsrst_delay 200
|
||||||
jtag_ntrst_delay 200
|
jtag_ntrst_delay 200
|
||||||
|
|
||||||
#use combined on interfaces or targets that can't set TRST/SRST separately
|
#use combined on interfaces or targets that can't set TRST/SRST separately
|
||||||
|
|
|
@ -19,7 +19,7 @@ if { [info exists CPUTAPID ] } {
|
||||||
}
|
}
|
||||||
|
|
||||||
#delays on reset lines
|
#delays on reset lines
|
||||||
jtag_nsrst_delay 200
|
adapter_nsrst_delay 200
|
||||||
jtag_ntrst_delay 200
|
jtag_ntrst_delay 200
|
||||||
|
|
||||||
# LPC2000 -> SRST causes TRST
|
# LPC2000 -> SRST causes TRST
|
||||||
|
|
|
@ -19,7 +19,7 @@ if { [info exists CPUTAPID ] } {
|
||||||
}
|
}
|
||||||
|
|
||||||
#delays on reset lines
|
#delays on reset lines
|
||||||
jtag_nsrst_delay 100
|
adapter_nsrst_delay 100
|
||||||
jtag_ntrst_delay 100
|
jtag_ntrst_delay 100
|
||||||
|
|
||||||
# LPC2000 -> SRST causes TRST
|
# LPC2000 -> SRST causes TRST
|
||||||
|
|
|
@ -7,7 +7,7 @@
|
||||||
adapter_khz 4500
|
adapter_khz 4500
|
||||||
|
|
||||||
reset_config srst_only
|
reset_config srst_only
|
||||||
jtag_nsrst_delay 100
|
adapter_nsrst_delay 100
|
||||||
|
|
||||||
#jtag scan chain
|
#jtag scan chain
|
||||||
if { [info exists CPUTAPID ] } {
|
if { [info exists CPUTAPID ] } {
|
||||||
|
|
|
@ -20,7 +20,7 @@ if { [info exists CPUTAPID ] } {
|
||||||
|
|
||||||
# FIXME most reset config belongs in board code
|
# FIXME most reset config belongs in board code
|
||||||
reset_config trst_and_srst
|
reset_config trst_and_srst
|
||||||
jtag_nsrst_delay 100
|
adapter_nsrst_delay 100
|
||||||
jtag_ntrst_delay 100
|
jtag_ntrst_delay 100
|
||||||
|
|
||||||
# jtag scan chain
|
# jtag scan chain
|
||||||
|
|
|
@ -14,7 +14,7 @@ if { [info exists CPUTAPID ] } {
|
||||||
set _CPUTAPID 0x0692602f
|
set _CPUTAPID 0x0692602f
|
||||||
}
|
}
|
||||||
|
|
||||||
jtag_nsrst_delay 100
|
adapter_nsrst_delay 100
|
||||||
|
|
||||||
# NOTE: presumes irlen 38 is the C55x DSP, matching BSDL for
|
# NOTE: presumes irlen 38 is the C55x DSP, matching BSDL for
|
||||||
# its standalone siblings (like TMS320VC5502) of the same era
|
# its standalone siblings (like TMS320VC5502) of the same era
|
||||||
|
|
|
@ -26,7 +26,7 @@ if { [info exists WORKAREASIZE] } {
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
jtag_nsrst_delay 100
|
adapter_nsrst_delay 100
|
||||||
jtag_ntrst_delay 100
|
jtag_ntrst_delay 100
|
||||||
|
|
||||||
#use combined on interfaces or targets that can't set TRST/SRST separately
|
#use combined on interfaces or targets that can't set TRST/SRST separately
|
||||||
|
|
|
@ -28,9 +28,9 @@ if { [info exists CPUTAPID2 ] } {
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
# set jtag_nsrst_delay to the delay introduced by your reset circuit
|
# set adapter_nsrst_delay to the delay introduced by your reset circuit
|
||||||
# the rest of the needed delays are built into the openocd program
|
# the rest of the needed delays are built into the openocd program
|
||||||
jtag_nsrst_delay 260
|
adapter_nsrst_delay 260
|
||||||
# set the jtag_ntrst_delay to the delay introduced by a reset circuit
|
# set the jtag_ntrst_delay to the delay introduced by a reset circuit
|
||||||
# the rest of the needed delays are built into the openocd program
|
# the rest of the needed delays are built into the openocd program
|
||||||
jtag_ntrst_delay 250
|
jtag_ntrst_delay 250
|
||||||
|
|
|
@ -59,9 +59,9 @@ if { [info exists CPUTAPID_PXA32X_C0 ] } {
|
||||||
set _CPUTAPID_PXA32X_C0 0x7E642013
|
set _CPUTAPID_PXA32X_C0 0x7E642013
|
||||||
}
|
}
|
||||||
|
|
||||||
# set jtag_nsrst_delay to the delay introduced by your reset circuit
|
# set adapter_nsrst_delay to the delay introduced by your reset circuit
|
||||||
# the rest of the needed delays are built into the openocd program
|
# the rest of the needed delays are built into the openocd program
|
||||||
jtag_nsrst_delay 260
|
adapter_nsrst_delay 260
|
||||||
|
|
||||||
# set the jtag_ntrst_delay to the delay introduced by a reset circuit
|
# set the jtag_ntrst_delay to the delay introduced by a reset circuit
|
||||||
# the rest of the needed delays are built into the openocd program
|
# the rest of the needed delays are built into the openocd program
|
||||||
|
|
|
@ -42,7 +42,7 @@ jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id
|
||||||
set _TARGETNAME $_CHIPNAME.cpu
|
set _TARGETNAME $_CHIPNAME.cpu
|
||||||
target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm1176
|
target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm1176
|
||||||
|
|
||||||
jtag_nsrst_delay 500
|
adapter_nsrst_delay 500
|
||||||
jtag_ntrst_delay 500
|
jtag_ntrst_delay 500
|
||||||
|
|
||||||
#reset configuration
|
#reset configuration
|
||||||
|
|
|
@ -19,7 +19,7 @@ if { [info exists CPUTAPID ] } {
|
||||||
set _CPUTAPID 0x08630001
|
set _CPUTAPID 0x08630001
|
||||||
}
|
}
|
||||||
|
|
||||||
jtag_nsrst_delay 100
|
adapter_nsrst_delay 100
|
||||||
jtag_ntrst_delay 100
|
jtag_ntrst_delay 100
|
||||||
|
|
||||||
reset_config trst_and_srst separate
|
reset_config trst_and_srst separate
|
||||||
|
|
|
@ -23,7 +23,7 @@ if { [info exists WORKAREASIZE] } {
|
||||||
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
|
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
|
||||||
adapter_khz 1000
|
adapter_khz 1000
|
||||||
|
|
||||||
jtag_nsrst_delay 100
|
adapter_nsrst_delay 100
|
||||||
jtag_ntrst_delay 100
|
jtag_ntrst_delay 100
|
||||||
|
|
||||||
#jtag scan chain
|
#jtag scan chain
|
||||||
|
|
|
@ -27,7 +27,7 @@ reset_config trst_and_srst srst_pulls_trst
|
||||||
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
|
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
|
||||||
|
|
||||||
#jtag nTRST and nSRST delay
|
#jtag nTRST and nSRST delay
|
||||||
jtag_nsrst_delay 500
|
adapter_nsrst_delay 500
|
||||||
jtag_ntrst_delay 500
|
jtag_ntrst_delay 500
|
||||||
|
|
||||||
set _TARGETNAME $_CHIPNAME.cpu
|
set _TARGETNAME $_CHIPNAME.cpu
|
||||||
|
|
|
@ -29,7 +29,7 @@ reset_config trst_and_srst srst_pulls_trst
|
||||||
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
|
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
|
||||||
|
|
||||||
#jtag nTRST and nSRST delay
|
#jtag nTRST and nSRST delay
|
||||||
jtag_nsrst_delay 500
|
adapter_nsrst_delay 500
|
||||||
jtag_ntrst_delay 500
|
jtag_ntrst_delay 500
|
||||||
|
|
||||||
set _TARGETNAME $_CHIPNAME.cpu
|
set _TARGETNAME $_CHIPNAME.cpu
|
||||||
|
|
|
@ -15,7 +15,7 @@ if { [info exists ENDIAN] } {
|
||||||
# jtag speed. We need to stick to 16kHz until we've finished reset.
|
# jtag speed. We need to stick to 16kHz until we've finished reset.
|
||||||
jtag_rclk 16
|
jtag_rclk 16
|
||||||
|
|
||||||
jtag_nsrst_delay 100
|
adapter_nsrst_delay 100
|
||||||
jtag_ntrst_delay 100
|
jtag_ntrst_delay 100
|
||||||
|
|
||||||
#use combined on interfaces or targets that can't set TRST/SRST separately
|
#use combined on interfaces or targets that can't set TRST/SRST separately
|
||||||
|
|
|
@ -16,7 +16,7 @@ source [find target/c100helper.tcl]
|
||||||
jtag_nsrst_assert_width 100
|
jtag_nsrst_assert_width 100
|
||||||
jtag_ntrst_assert_width 100
|
jtag_ntrst_assert_width 100
|
||||||
# don't talk to JTAG after reset for: [ms]
|
# don't talk to JTAG after reset for: [ms]
|
||||||
jtag_nsrst_delay 100
|
adapter_nsrst_delay 100
|
||||||
jtag_ntrst_delay 100
|
jtag_ntrst_delay 100
|
||||||
reset_config trst_and_srst separate
|
reset_config trst_and_srst separate
|
||||||
|
|
||||||
|
|
|
@ -32,7 +32,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
|
||||||
|
|
||||||
#use combined on interfaces or targets that can't set TRST/SRST separately
|
#use combined on interfaces or targets that can't set TRST/SRST separately
|
||||||
reset_config trst_and_srst
|
reset_config trst_and_srst
|
||||||
jtag_nsrst_delay 20
|
adapter_nsrst_delay 20
|
||||||
jtag_ntrst_delay 20
|
jtag_ntrst_delay 20
|
||||||
|
|
||||||
######################
|
######################
|
||||||
|
|
|
@ -32,7 +32,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
|
||||||
|
|
||||||
#use combined on interfaces or targets that can't set TRST/SRST separately
|
#use combined on interfaces or targets that can't set TRST/SRST separately
|
||||||
reset_config trst_and_srst
|
reset_config trst_and_srst
|
||||||
jtag_nsrst_delay 20
|
adapter_nsrst_delay 20
|
||||||
jtag_ntrst_delay 20
|
jtag_ntrst_delay 20
|
||||||
|
|
||||||
######################
|
######################
|
||||||
|
|
|
@ -22,7 +22,7 @@ if { [info exists CPUTAPID ] } {
|
||||||
|
|
||||||
reset_config trst_and_srst separate
|
reset_config trst_and_srst separate
|
||||||
|
|
||||||
jtag_nsrst_delay 100
|
adapter_nsrst_delay 100
|
||||||
jtag_ntrst_delay 100
|
jtag_ntrst_delay 100
|
||||||
|
|
||||||
#jtag scan chain
|
#jtag scan chain
|
||||||
|
|
|
@ -1,4 +1,4 @@
|
||||||
jtag_nsrst_delay 200
|
adapter_nsrst_delay 200
|
||||||
jtag_ntrst_delay 200
|
jtag_ntrst_delay 200
|
||||||
|
|
||||||
#use combined on interfaces or targets that can't set TRST/SRST separately
|
#use combined on interfaces or targets that can't set TRST/SRST separately
|
||||||
|
|
Loading…
Reference in New Issue