aarch64: correct display for aarch64 state
Aarch64 state has different PSTATE and exception level model. Correct the printout e.g. in poll command. Change-Id: I1820fd1836c7076ae0aa405fa335fd1a14a2e5b3 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>gitignore-build
parent
f442a530fa
commit
b273ec93c6
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@ -724,6 +724,27 @@ int armv8_init_arch_info(struct target *target, struct armv8_common *armv8)
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return ERROR_OK;
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}
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int armv8_aarch64_state(struct target *target)
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{
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struct arm *arm = target_to_arm(target);
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if (arm->common_magic != ARM_COMMON_MAGIC) {
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LOG_ERROR("BUG: called for a non-ARM target");
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return ERROR_FAIL;
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}
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LOG_USER("target halted in %s state due to %s, current mode: %s\n"
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"cpsr: 0x%8.8" PRIx32 " pc: 0x%" PRIx64 "%s",
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armv8_state_strings[arm->core_state],
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debug_reason_name(target),
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armv8_mode_name(arm->core_mode),
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buf_get_u32(arm->cpsr->value, 0, 32),
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buf_get_u64(arm->pc->value, 0, 64),
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arm->is_semihosting ? ", semihosting" : "");
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return ERROR_OK;
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}
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int armv8_arch_state(struct target *target)
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{
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static const char * const state[] = {
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@ -738,18 +759,15 @@ int armv8_arch_state(struct target *target)
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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if (arm->core_state == ARM_STATE_AARCH64)
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armv8_aarch64_state(target);
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else
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arm_arch_state(target);
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if (armv8->is_armv7r) {
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LOG_USER("D-Cache: %s, I-Cache: %s",
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state[armv8->armv8_mmu.armv8_cache.d_u_cache_enabled],
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state[armv8->armv8_mmu.armv8_cache.i_cache_enabled]);
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} else {
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LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s",
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state[armv8->armv8_mmu.mmu_enabled],
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state[armv8->armv8_mmu.armv8_cache.d_u_cache_enabled],
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state[armv8->armv8_mmu.armv8_cache.i_cache_enabled]);
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}
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if (arm->core_mode == ARM_MODE_ABT)
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armv8_show_fault_registers(target);
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