tcl: icepick: add icepick_d_set_coreid

this is just to avoid open coding that in
icepick_d_tapenable. Cleanup only, no functional
changes.

Change-Id: Iabd20291b7bdd95957afa1c74f52171789201227
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2624
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
__archive__
Felipe Balbi 2015-03-19 14:59:22 -05:00 committed by Paul Fertser
parent c32f81f718
commit b1f3e89970
3 changed files with 12 additions and 7 deletions

View File

@ -15,7 +15,7 @@ if { [info exists M3_DAP_TAPID] } {
set _M3_DAP_TAPID 0x4b6b902f
}
jtag newtap $_CHIPNAME m3_dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_DAP_TAPID -disable
jtag configure $_CHIPNAME.m3_dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 11"
jtag configure $_CHIPNAME.m3_dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 11 0"
#
# Main DAP
@ -26,7 +26,7 @@ if { [info exists DAP_TAPID] } {
set _DAP_TAPID 0x4b6b902f
}
jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
jtag configure $_CHIPNAME.dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 12"
jtag configure $_CHIPNAME.dap -event tap-enable "icepick_d_tapenable $_CHIPNAME.jrc 12 0"
#
# ICEpick-D (JTAG route controller)

View File

@ -457,7 +457,7 @@ if { [info exists M3_DAP_TAPID] } {
set _M3_DAP_TAPID 0x4b6b902f
}
jtag newtap $_CHIPNAME $M3_MODULE -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_M3_DAP_TAPID -disable
jtag configure $M3_NAME -event tap-enable "icepick_d_tapenable $JRC_NAME 11"
jtag configure $M3_NAME -event tap-enable "icepick_d_tapenable $JRC_NAME 11 0"
#
# DebugSS DAP
@ -468,7 +468,7 @@ if { [info exists DAP_TAPID] } {
set _DAP_TAPID 0x46b6902f
}
jtag newtap $_CHIPNAME $DEBUGSS_MODULE -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
jtag configure $DEBUGSS_NAME -event tap-enable "icepick_d_tapenable $JRC_NAME 12"
jtag configure $DEBUGSS_NAME -event tap-enable "icepick_d_tapenable $JRC_NAME 12 0"
#
# ICEpick-D (JTAG route controller)

View File

@ -107,11 +107,17 @@ proc icepick_c_tapenable {jrc port} {
runtest 10
}
# jrc == TAP name for the ICEpick
# coreid== core id number 0..15 (not same as port number!)
proc icepick_d_set_coreid {jrc coreid } {
icepick_c_router $jrc 1 0x6 $coreid 0x2008
}
# jrc == TAP name for the ICEpick
# port == a port number, 0..15
# Follow the sequence described in
# http://processors.wiki.ti.com/images/f/f6/Router_Scan_Sequence-ICEpick-D.pdf
proc icepick_d_tapenable {jrc port} {
proc icepick_d_tapenable {jrc port coreid} {
# First CONNECT to the ICEPick
icepick_c_connect $jrc
icepick_c_setup $jrc
@ -120,8 +126,7 @@ proc icepick_d_tapenable {jrc port} {
icepick_c_router $jrc 1 0x2 $port 0x2108
# Set 4 bit core ID to the Cortex-A
irscan $jrc [CONST IR_ROUTER] -endstate IRPAUSE
drscan $jrc 32 0xe0002008 -endstate DRPAUSE
icepick_d_set_coreid $jrc $coreid
# Enter the bypass state
irscan $jrc [CONST IF_BYPASS] -endstate RUN/IDLE