aarch64: remove references to armv7-r

aarch64 target doesn't support the -r profile anyway.

Change-Id: Iaa470ed9f95ea495ab1bafdf401f55a1ebcefddf
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
gitignore-build
Matthias Welwarsky 2016-09-01 22:27:28 +02:00
parent 56ab6ab159
commit ae7f2094c9
2 changed files with 9 additions and 19 deletions

View File

@ -2152,11 +2152,9 @@ static int aarch64_read_memory(struct target *target, target_addr_t address,
size, count); size, count);
/* determine if MMU was enabled on target stop */ /* determine if MMU was enabled on target stop */
if (!armv8->is_armv7r) {
retval = aarch64_mmu(target, &mmu_enabled); retval = aarch64_mmu(target, &mmu_enabled);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
}
if (armv8->memory_ap_available && (apsel == armv8->memory_ap->ap_num)) { if (armv8->memory_ap_available && (apsel == armv8->memory_ap->ap_num)) {
if (mmu_enabled) { if (mmu_enabled) {
@ -2209,16 +2207,13 @@ static int aarch64_write_phys_memory(struct target *target,
} else { } else {
/* write memory through APB-AP */ /* write memory through APB-AP */
if (!armv8->is_armv7r) {
retval = aarch64_mmu_modify(target, 0); retval = aarch64_mmu_modify(target, 0);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
}
return aarch64_write_apb_ap_memory(target, address, size, count, buffer); return aarch64_write_apb_ap_memory(target, address, size, count, buffer);
} }
} }
/* REVISIT this op is generic ARMv7-A/R stuff */ /* REVISIT this op is generic ARMv7-A/R stuff */
if (retval == ERROR_OK && target->state == TARGET_HALTED) { if (retval == ERROR_OK && target->state == TARGET_HALTED) {
struct arm_dpm *dpm = armv8->arm.dpm; struct arm_dpm *dpm = armv8->arm.dpm;
@ -2291,11 +2286,9 @@ static int aarch64_write_memory(struct target *target, target_addr_t address,
"; count %" PRId32, address, size, count); "; count %" PRId32, address, size, count);
/* determine if MMU was enabled on target stop */ /* determine if MMU was enabled on target stop */
if (!armv8->is_armv7r) {
retval = aarch64_mmu(target, &mmu_enabled); retval = aarch64_mmu(target, &mmu_enabled);
if (retval != ERROR_OK) if (retval != ERROR_OK)
return retval; return retval;
}
if (armv8->memory_ap_available && (apsel == armv8->memory_ap->ap_num)) { if (armv8->memory_ap_available && (apsel == armv8->memory_ap->ap_num)) {
LOG_DEBUG("Writing memory to address 0x%" TARGET_PRIxADDR "; size %" LOG_DEBUG("Writing memory to address 0x%" TARGET_PRIxADDR "; size %"
@ -2580,8 +2573,6 @@ static int aarch64_target_create(struct target *target, Jim_Interp *interp)
{ {
struct aarch64_common *aarch64 = calloc(1, sizeof(struct aarch64_common)); struct aarch64_common *aarch64 = calloc(1, sizeof(struct aarch64_common));
aarch64->armv8_common.is_armv7r = false;
return aarch64_init_arch_info(target, aarch64, target->tap); return aarch64_init_arch_info(target, aarch64, target->tap);
} }

View File

@ -139,7 +139,6 @@ struct armv8_common {
uint8_t multi_processor_system; uint8_t multi_processor_system;
uint8_t cluster_id; uint8_t cluster_id;
uint8_t cpu_id; uint8_t cpu_id;
bool is_armv7r;
/* armv8 aarch64 need below information for page translation */ /* armv8 aarch64 need below information for page translation */
uint8_t va_size; uint8_t va_size;