aarch64: remove references to armv7-r
aarch64 target doesn't support the -r profile anyway. Change-Id: Iaa470ed9f95ea495ab1bafdf401f55a1ebcefddf Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>gitignore-build
parent
56ab6ab159
commit
ae7f2094c9
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@ -2152,11 +2152,9 @@ static int aarch64_read_memory(struct target *target, target_addr_t address,
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size, count);
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size, count);
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/* determine if MMU was enabled on target stop */
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/* determine if MMU was enabled on target stop */
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if (!armv8->is_armv7r) {
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retval = aarch64_mmu(target, &mmu_enabled);
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retval = aarch64_mmu(target, &mmu_enabled);
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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return retval;
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return retval;
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}
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if (armv8->memory_ap_available && (apsel == armv8->memory_ap->ap_num)) {
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if (armv8->memory_ap_available && (apsel == armv8->memory_ap->ap_num)) {
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if (mmu_enabled) {
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if (mmu_enabled) {
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@ -2209,16 +2207,13 @@ static int aarch64_write_phys_memory(struct target *target,
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} else {
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} else {
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/* write memory through APB-AP */
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/* write memory through APB-AP */
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if (!armv8->is_armv7r) {
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retval = aarch64_mmu_modify(target, 0);
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retval = aarch64_mmu_modify(target, 0);
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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return retval;
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return retval;
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}
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return aarch64_write_apb_ap_memory(target, address, size, count, buffer);
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return aarch64_write_apb_ap_memory(target, address, size, count, buffer);
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}
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}
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}
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}
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/* REVISIT this op is generic ARMv7-A/R stuff */
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/* REVISIT this op is generic ARMv7-A/R stuff */
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if (retval == ERROR_OK && target->state == TARGET_HALTED) {
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if (retval == ERROR_OK && target->state == TARGET_HALTED) {
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struct arm_dpm *dpm = armv8->arm.dpm;
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struct arm_dpm *dpm = armv8->arm.dpm;
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@ -2291,11 +2286,9 @@ static int aarch64_write_memory(struct target *target, target_addr_t address,
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"; count %" PRId32, address, size, count);
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"; count %" PRId32, address, size, count);
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/* determine if MMU was enabled on target stop */
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/* determine if MMU was enabled on target stop */
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if (!armv8->is_armv7r) {
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retval = aarch64_mmu(target, &mmu_enabled);
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retval = aarch64_mmu(target, &mmu_enabled);
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if (retval != ERROR_OK)
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if (retval != ERROR_OK)
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return retval;
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return retval;
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}
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if (armv8->memory_ap_available && (apsel == armv8->memory_ap->ap_num)) {
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if (armv8->memory_ap_available && (apsel == armv8->memory_ap->ap_num)) {
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LOG_DEBUG("Writing memory to address 0x%" TARGET_PRIxADDR "; size %"
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LOG_DEBUG("Writing memory to address 0x%" TARGET_PRIxADDR "; size %"
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@ -2580,8 +2573,6 @@ static int aarch64_target_create(struct target *target, Jim_Interp *interp)
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{
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{
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struct aarch64_common *aarch64 = calloc(1, sizeof(struct aarch64_common));
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struct aarch64_common *aarch64 = calloc(1, sizeof(struct aarch64_common));
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aarch64->armv8_common.is_armv7r = false;
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return aarch64_init_arch_info(target, aarch64, target->tap);
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return aarch64_init_arch_info(target, aarch64, target->tap);
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}
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}
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@ -139,7 +139,6 @@ struct armv8_common {
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uint8_t multi_processor_system;
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uint8_t multi_processor_system;
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uint8_t cluster_id;
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uint8_t cluster_id;
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uint8_t cpu_id;
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uint8_t cpu_id;
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bool is_armv7r;
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/* armv8 aarch64 need below information for page translation */
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/* armv8 aarch64 need below information for page translation */
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uint8_t va_size;
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uint8_t va_size;
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