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ARM: cygwin complile fixes 

It's as if despite integers being 32-bits, GCC refuses to
convert a "uint32_t" to one of them.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
__archive__
David Brownell 2009-12-08 02:00:35 -08:00
parent 96d2b61c04
commit ac19fc0da7
1 changed files with 6 additions and 4 deletions
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10
src/target/arm_disassembler.c
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@ -158,14 +158,16 @@ static int evaluate_srs(uint32_t opcode,
"\t0x%8.8" PRIx32 "\t0x%8.8" PRIx32
"\tSRS%s\tSP%s, #%d", "\tSRS%s\tSP%s, #%d",
address, opcode, address, opcode,
mode, wback, opcode & 0x1f); mode, wback,
(unsigned)(opcode & 0x1f));
break; break;
case 0x08100000: case 0x08100000:
snprintf(instruction->text, 128, "0x%8.8" PRIx32 snprintf(instruction->text, 128, "0x%8.8" PRIx32
"\t0x%8.8" PRIx32 "\t0x%8.8" PRIx32
"\tRFE%s\tr%d%s", "\tRFE%s\tr%d%s",
address, opcode, address, opcode,
mode, (opcode >> 16) & 0xf, wback); mode,
(unsigned)((opcode >> 16) & 0xf), wback);
break; break;
default: default:
return evaluate_unknown(opcode, address, instruction); return evaluate_unknown(opcode, address, instruction);
@ -3467,14 +3469,14 @@ static int t2ev_ldm_stm(uint32_t opcode, uint32_t address,
case 6: case 6:
sprintf(cp, "SRS%s\tsp%s, #%d", mode, sprintf(cp, "SRS%s\tsp%s, #%d", mode,
t ? "!" : "", t ? "!" : "",
opcode & 0x1f); (unsigned) (opcode & 0x1f));
return ERROR_OK; return ERROR_OK;
case 1: case 1:
mode = "DB"; mode = "DB";
/* FALL THROUGH */ /* FALL THROUGH */
case 7: case 7:
sprintf(cp, "RFE%s\tr%d%s", mode, sprintf(cp, "RFE%s\tr%d%s", mode,
(opcode >> 16) & 0xf, (unsigned) ((opcode >> 16) & 0xf),
t ? "!" : ""); t ? "!" : "");
return ERROR_OK; return ERROR_OK;
case 2: case 2: