cortex_a9: check if MMU is enabled on APB read/write memory
Signed-off-by: Luca Ellero <lroluk@gmail.com>__archive__
parent
f609d03f1f
commit
aaa52e16ce
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@ -1521,6 +1521,7 @@ static int cortex_a9_read_phys_memory(struct target *target,
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uint32_t saved_r0, saved_r1;
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int nbytes = count * size;
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uint32_t data;
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int enabled = 0;
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if (target->state != TARGET_HALTED)
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{
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@ -1528,6 +1529,16 @@ static int cortex_a9_read_phys_memory(struct target *target,
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return ERROR_TARGET_NOT_HALTED;
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}
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retval = cortex_a9_mmu(target, &enabled);
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if (retval != ERROR_OK)
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return retval;
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if (enabled)
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{
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LOG_WARNING("Reading physical memory through APB with MMU enabled is not yet implemented");
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return ERROR_TARGET_FAILURE;
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}
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/* save registers r0 and r1, we are going to corrupt them */
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retval = cortex_a9_dap_read_coreregister_u32(target, &saved_r0, 0);
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if (retval != ERROR_OK)
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@ -1635,6 +1646,7 @@ static int cortex_a9_write_phys_memory(struct target *target,
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uint32_t saved_r0, saved_r1;
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int nbytes = count * size;
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uint32_t data;
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int enabled = 0;
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if (target->state != TARGET_HALTED)
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{
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@ -1642,6 +1654,16 @@ static int cortex_a9_write_phys_memory(struct target *target,
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return ERROR_TARGET_NOT_HALTED;
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}
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retval = cortex_a9_mmu(target, &enabled);
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if (retval != ERROR_OK)
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return retval;
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if (enabled)
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{
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LOG_WARNING("Writing physical memory through APB with MMU enabled is not yet implemented");
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return ERROR_TARGET_FAILURE;
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}
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/* save registers r0 and r1, we are going to corrupt them */
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retval = cortex_a9_dap_read_coreregister_u32(target, &saved_r0, 0);
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if (retval != ERROR_OK)
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