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flash/stmsmi: fix byte order for big-endian host 

The original code was written for and tested on little-endian
host only.

Rewrite it to be independent by host endianess.
Not tested on real HW; I don't own anymore a SPEAr device.

Change-Id: I2f427a804693f56cb9dea4936c525eb814c48c28
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4778
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
log_output
Antonio Borneo 2018-11-26 15:52:51 +01:00 committed by Tomas Vanek
parent 82dd17e248
commit 9d67f00670
1 changed files with 7 additions and 10 deletions
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17
src/flash/nor/stmsmi.c
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@ -269,17 +269,14 @@ static int smi_write_enable(struct flash_bank *bank)
static uint32_t erase_command(struct stmsmi_flash_bank *stmsmi_info,
uint32_t offset)
{
union {
uint32_t command;
uint8_t x[4];
} cmd;
uint8_t cmd_bytes[] = {
stmsmi_info->dev->erase_cmd,
offset >> 16,
offset >> 8,
offset
};
cmd.x[0] = stmsmi_info->dev->erase_cmd;
cmd.x[1] = offset >> 16;
cmd.x[2] = offset >> 8;
cmd.x[3] = offset;
return cmd.command;
return le_to_h_u32(cmd_bytes);
}
static int smi_erase_sector(struct flash_bank *bank, int sector)