Use hardware single step.
parent
eac8933b89
commit
9b9653ab7d
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@ -827,12 +827,12 @@ static int riscv_halt(struct target *target)
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static int riscv_step(struct target *target, int current, uint32_t address,
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int handle_breakpoints)
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{
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riscv_info_t *info = (riscv_info_t *) target->arch_info;
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jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
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// Hardware single step doesn't exist yet.
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#if 0
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#if 1
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return resume(target, current, address, handle_breakpoints, 0, true);
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#else
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riscv_info_t *info = (riscv_info_t *) target->arch_info;
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uint32_t next_pc = info->dpc + 4;
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// TODO: write better next pc prediction code
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if (breakpoint_add(target, next_pc, 4, BKPT_SOFT) != ERROR_OK) {
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