Merge remote-tracking branch 'origin/reset-unexpected-check' into riscv-compliance
commit
9a5a5c2dc9
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@ -1648,15 +1648,12 @@ static int deassert_reset(struct target *target)
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char *operation;
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char *operation;
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uint32_t expected_field;
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uint32_t expected_field;
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uint32_t unexpected_field;
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if (target->reset_halt) {
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if (target->reset_halt) {
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operation = "halt";
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operation = "halt";
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expected_field = DMI_DMSTATUS_ALLHALTED;
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expected_field = DMI_DMSTATUS_ALLHALTED;
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unexpected_field = DMI_DMSTATUS_ANYRUNNING;
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} else {
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} else {
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operation = "run";
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operation = "run";
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expected_field = DMI_DMSTATUS_ALLRUNNING;
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expected_field = DMI_DMSTATUS_ALLRUNNING;
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unexpected_field = DMI_DMSTATUS_ANYHALTED;
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}
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}
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LOG_DEBUG("Waiting for hart %d to %s out of reset.", index, operation);
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LOG_DEBUG("Waiting for hart %d to %s out of reset.", index, operation);
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while (1) {
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while (1) {
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@ -1669,11 +1666,6 @@ static int deassert_reset(struct target *target)
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index, riscv_reset_timeout_sec);
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index, riscv_reset_timeout_sec);
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if (result != ERROR_OK)
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if (result != ERROR_OK)
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return result;
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return result;
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if (get_field(dmstatus, unexpected_field)) {
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LOG_ERROR("Unexpected hart %d status during reset. dmstatus=0x%x",
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index, dmstatus);
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return ERROR_FAIL;
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}
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if (get_field(dmstatus, expected_field))
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if (get_field(dmstatus, expected_field))
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break;
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break;
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if (time(NULL) - start > riscv_reset_timeout_sec) {
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if (time(NULL) - start > riscv_reset_timeout_sec) {
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