Don't write sbcs while sbbusy is set. (#375)
* Fix small SBA bug. We were not compliant with the spec, but I'm not sure if this was causing problems for anybody. Change-Id: Ia31ee400fd75ad907349c4dd995b1e03bd2116c7 * Don't write sbcs while sbbusy is set. Probably not hurting anything, but the spec says we shouldn't. Also propagate more errors, and fully decode sbcs in debug output. Change-Id: I1a36646772fe794c8780702565103a309bbcc5e9reverse-resume-order
parent
c7a78e9c57
commit
998fed1fe7
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@ -335,6 +335,9 @@ static void decode_dmi(char *text, unsigned address, unsigned data)
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{ DMI_COMMAND, DMI_COMMAND_CMDTYPE, "cmdtype" },
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{ DMI_SBCS, DMI_SBCS_SBVERSION, "sbversion" },
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{ DMI_SBCS, DMI_SBCS_SBBUSYERROR, "sbbusyerror" },
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{ DMI_SBCS, DMI_SBCS_SBBUSY, "sbbusy" },
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{ DMI_SBCS, DMI_SBCS_SBREADONADDR, "sbreadonaddr" },
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{ DMI_SBCS, DMI_SBCS_SBACCESS, "sbaccess" },
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{ DMI_SBCS, DMI_SBCS_SBAUTOINCREMENT, "sbautoincrement" },
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@ -2136,10 +2139,12 @@ static int read_memory_bus_v1(struct target *target, target_addr_t address,
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sbcs |= sb_sbaccess(size);
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sbcs = set_field(sbcs, DMI_SBCS_SBAUTOINCREMENT, 1);
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sbcs = set_field(sbcs, DMI_SBCS_SBREADONDATA, count > 1);
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dmi_write(target, DMI_SBCS, sbcs);
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if (dmi_write(target, DMI_SBCS, sbcs) != ERROR_OK)
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return ERROR_FAIL;
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/* This address write will trigger the first read. */
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sb_write_address(target, next_address);
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if (sb_write_address(target, next_address) != ERROR_OK)
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return ERROR_FAIL;
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if (info->bus_master_read_delay) {
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jtag_add_runtest(info->bus_master_read_delay, TAP_IDLE);
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@ -2150,22 +2155,31 @@ static int read_memory_bus_v1(struct target *target, target_addr_t address,
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}
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for (uint32_t i = (next_address - address) / size; i < count - 1; i++) {
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read_memory_bus_word(target, address + i * size, size,
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buffer + i * size);
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if (read_memory_bus_word(target, address + i * size, size,
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buffer + i * size) != ERROR_OK)
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return ERROR_FAIL;
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}
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sbcs = set_field(sbcs, DMI_SBCS_SBREADONDATA, 0);
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dmi_write(target, DMI_SBCS, sbcs);
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/* "Writes to sbcs while sbbusy is high result in undefined behavior.
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* A debugger must not write to sbcs until it reads sbbusy as 0." */
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if (read_sbcs_nonbusy(target, &sbcs) != ERROR_OK)
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return ERROR_FAIL;
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read_memory_bus_word(target, address + (count - 1) * size, size,
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buffer + (count - 1) * size);
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sbcs = set_field(sbcs, DMI_SBCS_SBREADONDATA, 0);
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if (dmi_write(target, DMI_SBCS, sbcs) != ERROR_OK)
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return ERROR_FAIL;
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if (read_memory_bus_word(target, address + (count - 1) * size, size,
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buffer + (count - 1) * size) != ERROR_OK)
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return ERROR_FAIL;
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if (read_sbcs_nonbusy(target, &sbcs) != ERROR_OK)
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return ERROR_FAIL;
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if (get_field(sbcs, DMI_SBCS_SBBUSYERROR)) {
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/* We read while the target was busy. Slow down and try again. */
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dmi_write(target, DMI_SBCS, DMI_SBCS_SBBUSYERROR);
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if (dmi_write(target, DMI_SBCS, DMI_SBCS_SBBUSYERROR) != ERROR_OK)
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return ERROR_FAIL;
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next_address = sb_read_address(target);
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info->bus_master_read_delay += info->bus_master_read_delay / 10 + 1;
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continue;
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@ -2177,7 +2191,8 @@ static int read_memory_bus_v1(struct target *target, target_addr_t address,
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} else {
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/* Some error indicating the bus access failed, but not because of
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* something we did wrong. */
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dmi_write(target, DMI_SBCS, DMI_SBCS_SBERROR);
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if (dmi_write(target, DMI_SBCS, DMI_SBCS_SBERROR) != ERROR_OK)
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return ERROR_FAIL;
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return ERROR_FAIL;
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}
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}
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