cfi: unsupported code paths now report and return error
found by clang, would have done something undefined and mysterious later on. Change-Id: If7d7aca8514575d229ed0b17378bf8b1bbf347c4 Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com> Reviewed-on: http://openocd.zylin.com/133 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>__archive__
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08815946f6
commit
9933fa334d
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@ -1897,13 +1897,15 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
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armv4_5_info.common_magic = ARMV7M_COMMON_MAGIC;
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armv4_5_info.core_mode = ARMV7M_MODE_HANDLER;
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armv4_5_info.core_state = ARM_STATE_ARM;
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}
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else
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} else if (armv4_5_info.common_magic == ARM_COMMON_MAGIC)
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{
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/* All other ARM CPUs have 32 bit instructions */
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armv4_5_info.common_magic = ARM_COMMON_MAGIC;
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armv4_5_info.core_mode = ARM_MODE_SVC;
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armv4_5_info.core_state = ARM_STATE_ARM;
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} else {
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LOG_ERROR("Unknown ARM architecture");
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return ERROR_FAIL;
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}
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int target_code_size = 0;
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@ -1912,11 +1914,12 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
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switch (bank->bus_width)
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{
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case 1 :
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if(armv4_5_info.common_magic == ARM_COMMON_MAGIC) /* armv4_5 target */
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{
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target_code_src = armv4_5_word_8_code;
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target_code_size = sizeof(armv4_5_word_8_code);
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if (armv4_5_info.common_magic != ARM_COMMON_MAGIC) {
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LOG_ERROR("Unknown ARM architecture");
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return ERROR_FAIL;
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}
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target_code_src = armv4_5_word_8_code;
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target_code_size = sizeof(armv4_5_word_8_code);
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break;
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case 2 :
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/* Check for DQ5 support */
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@ -1936,19 +1939,21 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,
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else
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{
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/* No DQ5 support. Use DQ7 DATA# polling only. */
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if(armv4_5_info.common_magic == ARM_COMMON_MAGIC) // armv4_5 target
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{
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target_code_src = armv4_5_word_16_code_dq7only;
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target_code_size = sizeof(armv4_5_word_16_code_dq7only);
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if (armv4_5_info.common_magic != ARM_COMMON_MAGIC) {
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LOG_ERROR("Unknown ARM architecture");
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return ERROR_FAIL;
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}
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target_code_src = armv4_5_word_16_code_dq7only;
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target_code_size = sizeof(armv4_5_word_16_code_dq7only);
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}
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break;
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case 4 :
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if(armv4_5_info.common_magic == ARM_COMMON_MAGIC) // armv4_5 target
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{
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target_code_src = armv4_5_word_32_code;
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target_code_size = sizeof(armv4_5_word_32_code);
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if (armv4_5_info.common_magic != ARM_COMMON_MAGIC) {
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LOG_ERROR("Unknown ARM architecture");
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return ERROR_FAIL;
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}
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target_code_src = armv4_5_word_32_code;
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target_code_size = sizeof(armv4_5_word_32_code);
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break;
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default:
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LOG_ERROR("Unsupported bank buswidth %d, can't do block memory writes", bank->bus_width);
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