Add common LPC2xxx setup procedure, use in all LPC2xxx files.
Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>__archive__
Freddie Chopin
Øyvind Harboe
parent
aa61a3b3d8
commit
94fa8fd30a
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@ -1,32 +1,9 @@
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# NXP LPC2103 ARM7TDMI-S with 32kB Flash and 8kB SRAM, clocked with 12MHz crystal
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# NXP LPC2103 ARM7TDMI-S with 32kB flash and 8kB SRAM, clocked with 12MHz crystal
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME lpc2103
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source [find target/lpc2xxx.cfg]
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proc init_targets {} {
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# 32kB flash and 8kB SRAM, clocked with 12MHz crystal
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# setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
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setup_lpc2xxx lpc2103 0x4f1f0f0f 0x8000 lpc2000_v2 0x2000 12000 1500
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x4f1f0f0f
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}
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reset_config trst_and_srst
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# reset delays
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
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# 8kB of internal SRAM
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$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x2000 -work-area-backup 0
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# 32kB of internal Flash, core clocked with 12MHz crystal
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# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME lpc2000 0x0 0x8000 0 0 $_TARGETNAME lpc2000_v2 12000 calc_checksum
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@ -1,33 +1,9 @@
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# NXP LPC2124
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# NXP LPC2124 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME lpc2124
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source [find target/lpc2xxx.cfg]
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proc init_targets {} {
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# 256kB flash and 16kB SRAM, clocked with 12MHz crystal
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# setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
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setup_lpc2xxx lpc2124 0x4f1f0f0f 0x40000 lpc2000_v1 0x4000 12000 1500
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x4f1f0f0f
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}
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reset_config trst_and_srst
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# reset delays
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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adapter_khz 1000
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#jtag scan chain
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
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# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14745 calc_checksum
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@ -1,31 +1,9 @@
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# NXP LPC2129
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# NXP LPC2129 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME lpc2129
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source [find target/lpc2xxx.cfg]
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proc init_targets {} {
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# 256kB flash and 16kB SRAM, clocked with 12MHz crystal
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# setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
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setup_lpc2xxx lpc2129 0xcf1f0f0f 0x40000 lpc2000_v1 0x4000 12000 1500
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0xcf1f0f0f
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}
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reset_config trst_and_srst
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# reset delays
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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#jtag scan chain
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
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# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14765 calc_checksum
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@ -1,45 +1,9 @@
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# Proc that can be invoked to create a special version of
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# the LPC2148
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proc setup_lpc2148 {chipname tapids} {
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# Use RCLK. If RCLK is not available fall back to 500kHz.
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#
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# Depending on cabling you might be able to eek this up to 2000kHz.
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jtag_rclk 500
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adapter_nsrst_delay 200
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jtag_ntrst_delay 200
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# NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate
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# JTAG, power-on reset is not enough, i.e. you need to perform a
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# reset before being able to talk to the LPC2148, attach is not possible.
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reset_config trst_and_srst
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eval "jtag newtap $chipname cpu -irlen 4 -ircapture 0x1 -irmask 0xf $tapids"
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target create $chipname.cpu arm7tdmi -chain-position $chipname.cpu
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$chipname.cpu configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
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$chipname.cpu configure -event reset-init {
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# Force target into ARM state
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arm core_state arm
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# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
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# "User Flash Mode" where interrupt vectors are _not_ remapped,
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# and reside in flash instead).
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#
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# See section 7.1 on page 32 ("Memory Mapping control register") in
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# "UM10139: Volume 1: LPC214x User Manual", Rev. 02 -- 25 July 2006.
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# http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc2141.lpc2142.lpc2144.lpc2146.lpc2148.pdf
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mwb 0xE01FC040 0x01
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}
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# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
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flash bank $chipname.flash lpc2000 0x0 0x7d000 0 0 $chipname.cpu lpc2000_v2 14765 calc_checksum
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}
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# NXP LPC2148 ARM7TDMI-S with 512kB flash (12kB used by bootloader) and 40kB SRAM (8kB for USB DMA), clocked with 12MHz crystal
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source [find target/lpc2xxx.cfg]
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# Default settings
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proc init_targets {} {
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setup_lpc2148 lpc2148 "-expected-id 0x3f0f0f0f -expected-id 0x4f1f0f0f"
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# 500kB flash and 32kB SRAM, clocked with 12MHz crystal
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# setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
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setup_lpc2xxx lpc2148 "0x3f0f0f0f 0x4f1f0f0f" 0x7d000 lpc2000_v2 0x8000 12000 1500
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}
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@ -1,29 +1,11 @@
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME lpc2294
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# NXP LPC2294 ARM7TDMI-S with 256kB flash and 16kB SRAM, clocked with 12MHz crystal
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source [find target/lpc2xxx.cfg]
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proc init_targets {} {
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# 256kB flash and 16kB SRAM, clocked with 12MHz crystal
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# setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
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# !! TAPID unknown !!
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setup_lpc2xxx lpc2294 0xffffffff 0x40000 lpc2000_v1 0x4000 12000 1500
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# force an error till we get a good number
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set _CPUTAPID 0xffffffff
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}
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adapter_nsrst_delay 200
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jtag_ntrst_delay 200
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reset_config trst_and_srst
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#jtag scan chain
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
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#flash configuration
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# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME lpc2000 0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14765 calc_checksum
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@ -1,43 +1,9 @@
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# NXP LPC2378 ARM7TDMI-S with 512kB Flash and 32kB Local On-Chip SRAM (58kB total), clocked with 4MHz internal RC oscillator
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# NXP LPC2378 ARM7TDMI-S with 512kB flash (8kB used by bootloader) and 56kB SRAM (16kB for ETH, 8kB for DMA), clocked with 4MHz internal oscillator
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME lpc2378
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source [find target/lpc2xxx.cfg]
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proc init_targets {} {
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# 504kB flash and 32kB SRAM, clocked with 4MHz internal oscillator
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# setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
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setup_lpc2xxx lpc2378 0x4f1f0f0f 0x7e000 lpc2000_v2 0x8000 4000 500
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x4f1f0f0f
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}
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#delays on reset lines
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adapter_nsrst_delay 200
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jtag_ntrst_delay 200
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reset_config trst_and_srst
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
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# LPC2378 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
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$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x8000 -work-area-backup 0
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$_TARGETNAME configure -event reset-init {
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# Force target into ARM state
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arm core_state arm
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#do not remap 0x0000-0x0020 to anything but the flash
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mwb 0xE01FC040 0x01
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}
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# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
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# After reset the chip uses its internal 4MHz RC oscillator
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# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME lpc2000 0x0 0x0007D000 0 0 $_TARGETNAME lpc2000_v2 4000 calc_checksum
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# 4MHz / 6 = 666kHz, so use 500
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adapter_khz 500
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@ -1,46 +1,9 @@
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# NXP LPC2478 ARM7TDMI-S with 512kB Flash and 64kB Local On-Chip SRAM (98kB total), clocked with 4MHz internal RC oscillator
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# NXP LPC2478 ARM7TDMI-S with 512kB flash (8kB used by bootloader) and 98kB SRAM (16kB for ETH, 16kB for DMA, 2kB for RTC), clocked with 4MHz internal oscillator
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME lpc2478
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source [find target/lpc2xxx.cfg]
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proc init_targets {} {
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# 504kB flash and 64kB SRAM, clocked with 4MHz internal oscillator
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# setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
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setup_lpc2xxx lpc2478 0x4f1f0f0f 0x7e000 lpc2000_v2 0x10000 4000 500
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x4f1f0f0f
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}
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if { [info exists CCLK ] } {
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set _CCLK $CCLK
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} else {
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error "You must specify the CCLK that will be used for flash programming!"
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}
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#delays on reset lines
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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reset_config trst_and_srst
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
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# LPC2478 has 64kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
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$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0
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$_TARGETNAME configure -event reset-init {
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# Force target into ARM state
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arm core_state arm
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# Do not remap 0x0000-0x0020 to anything but the Flash
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mwb 0xE01FC040 0x01
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}
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# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
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# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME lpc2000 0x0 0x7E000 0 0 $_TARGETNAME lpc2000_v2 $_CCLK calc_checksum
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@ -0,0 +1,41 @@
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# Common setup for the LPC2xxx parts
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# parameters:
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# - chip_name - name of the chip, e.g. lpc2103
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# - cputapids - TAP IDs of the core, should be quoted if more than one, e.g. 0x4f1f0f0f or "0x3f0f0f0f 0x4f1f0f0f"
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# - flash_size - size of on-chip flash (available for code, not including the bootloader) in bytes, e.g. 0x8000
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# - flash_variant - "type" of LPC2xxx device, lpc2000_v1 (LPC22xx and older LPC21xx) or lpc2000_v2 (LPC213x, LPC214x, LPC210[123], LPC23xx and LPC24xx)
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# - workarea_size - size of work-area in RAM for flashing procedures, must not exceed the size of RAM available at 0x40000000, e.g. 0x2000
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# - core_freq_khz - frequency of core in kHz during flashing, usually equal to connected crystal or internal oscillator, e.g. 12000
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# - adapter_freq_khz - frequency of debug adapter in kHz, should be 8x slower than core_freq_khz, e.g. 1000
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proc setup_lpc2xxx {chip_name cputapids flash_size flash_variant workarea_size core_freq_khz adapter_freq_khz} {
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reset_config trst_and_srst
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# reset delays
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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adapter_khz $adapter_freq_khz
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foreach i $cputapids {
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append expected_ids "-expected-id " $i " "
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}
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eval "jtag newtap $chip_name cpu -irlen 4 -ircapture 0x1 -irmask 0xf $expected_ids"
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set _TARGETNAME $chip_name.cpu
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target create $_TARGETNAME arm7tdmi -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size $workarea_size -work-area-backup 0
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# flash bank <name> lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
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set _FLASHNAME $chip_name.flash
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flash bank $_FLASHNAME lpc2000 0x0 $flash_size 0 0 $_TARGETNAME $flash_variant $core_freq_khz calc_checksum
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}
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proc init_targets {} {
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# FIX!!! read out CPUTAPID here and choose right setup. In addition to the
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# CPUTAPID some querying of the target would be required.
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return -error "This is a generic LPC2xxx configuration file, use a specific target file."
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}
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