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armv7m: Do not ignore 'value' parameter in armv7m_write_core_reg 

Ignoring the value parameter in that function makes its code rather
misleading. Also the only caller of it, armv7m_restore_context already
does the whole "buf_get_u32" conversion business, so using
'value' also removes the waste of doing the conversion twice.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Change-Id: I515979c314d9b59ee1065c55b5bb5747c7e93f01
Reviewed-on: http://openocd.zylin.com/2057
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
__archive__
Andrey Smirnov 2014-03-19 08:20:36 -07:00 committed by Paul Fertser
parent 91a36fcf0a
commit 947a459e18
1 changed files with 3 additions and 5 deletions
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8
src/target/armv7m.c
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@ -216,24 +216,22 @@ static int armv7m_write_core_reg(struct target *target, struct reg *r,
int num, enum arm_mode mode, uint32_t value) int num, enum arm_mode mode, uint32_t value)
{ {
int retval; int retval;
uint32_t reg_value;
struct arm_reg *armv7m_core_reg; struct arm_reg *armv7m_core_reg;
struct armv7m_common *armv7m = target_to_armv7m(target); struct armv7m_common *armv7m = target_to_armv7m(target);
assert(num < (int)armv7m->arm.core_cache->num_regs); assert(num < (int)armv7m->arm.core_cache->num_regs);
reg_value = buf_get_u32(armv7m->arm.core_cache->reg_list[num].value, 0, 32);
armv7m_core_reg = armv7m->arm.core_cache->reg_list[num].arch_info; armv7m_core_reg = armv7m->arm.core_cache->reg_list[num].arch_info;
retval = armv7m->store_core_reg_u32(target, retval = armv7m->store_core_reg_u32(target,
armv7m_core_reg->num, armv7m_core_reg->num,
reg_value); value);
if (retval != ERROR_OK) { if (retval != ERROR_OK) {
LOG_ERROR("JTAG failure"); LOG_ERROR("JTAG failure");
armv7m->arm.core_cache->reg_list[num].dirty = armv7m->arm.core_cache->reg_list[num].valid; armv7m->arm.core_cache->reg_list[num].dirty = armv7m->arm.core_cache->reg_list[num].valid;
return ERROR_JTAG_DEVICE_ERROR; return ERROR_JTAG_DEVICE_ERROR;
} }
LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num, reg_value); LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num, value);
armv7m->arm.core_cache->reg_list[num].valid = 1; armv7m->arm.core_cache->reg_list[num].valid = 1;
armv7m->arm.core_cache->reg_list[num].dirty = 0; armv7m->arm.core_cache->reg_list[num].dirty = 0;