tcl: add Zynq-7000 target and Zedboard board configs
Change-Id: Ia7f2a57d1b32dda9936ad87e22635f7749ff3ce1 Signed-off-by: Tim Sander <tim@krieglstein.org> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2061 Tested-by: jenkins__archive__
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#
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# Digilent Zedboard Rev.C, Rev.D with Xilinx Zynq chip
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#
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# http://zedboard.com/product/zedboard
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#
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source [find interface/ftdi/digilent_jtag_smt2.cfg]
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reset_config srst_only srst_push_pull
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source [find target/zynq_7000.cfg]
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#
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# Xilinx Zynq-7000 All Programmable SoC
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#
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# http://www.xilinx.com/products/silicon-devices/soc/zynq-7000/index.htm
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#
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set _CHIPNAME zynq
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set _TARGETNAME $_CHIPNAME.cpu
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jtag newtap zynq_pl bs -irlen 6 -ircapture 0x1 -irmask 0x03 \
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-expected-id 0x23727093 \
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-expected-id 0x03727093
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jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x4ba00477
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target create ${_TARGETNAME}0 cortex_a -chain-position $_CHIPNAME.dap \
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-coreid 0 -dbgbase 0x80090000
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target create ${_TARGETNAME}1 cortex_a -chain-position $_CHIPNAME.dap \
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-coreid 1 -dbgbase 0x80092000
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target smp ${_TARGETNAME}0 ${_TARGETNAME}1
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adapter_khz 1000
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${_TARGETNAME}0 configure -event reset-assert-post "cortex_a dbginit"
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${_TARGETNAME}1 configure -event reset-assert-post "cortex_a dbginit"
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