diff --git a/doc/openocd.texi b/doc/openocd.texi index 83f60520b..21b55dca0 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -5347,12 +5347,12 @@ since the alternate function must be enabled on the GPIO pin CS1/CS2 is routed to on the given SoC. @example -flash bank $_FLASHNAME ath79 0 0 0 0 $_TARGETNAME +flash bank $_FLASHNAME ath79 0xbf000000 0 0 0 $_TARGETNAME # When using multiple chipselects the base should be different for each, # otherwise the write_image command is not able to distinguish the # banks. -flash bank flash0 ath79 0x00000000 0 0 0 $_TARGETNAME cs0 +flash bank flash0 ath79 0xbf000000 0 0 0 $_TARGETNAME cs0 flash bank flash1 ath79 0x10000000 0 0 0 $_TARGETNAME cs1 flash bank flash2 ath79 0x20000000 0 0 0 $_TARGETNAME cs2 @end example diff --git a/src/flash/nor/ath79.c b/src/flash/nor/ath79.c index d73a4916f..520f6c5b9 100644 --- a/src/flash/nor/ath79.c +++ b/src/flash/nor/ath79.c @@ -653,13 +653,6 @@ static int ath79_write(struct flash_bank *bank, const uint8_t *buffer, LOG_DEBUG("%s: offset=0x%08" PRIx32 " count=0x%08" PRIx32, __func__, offset, count); - if (offset < bank->base || offset >= bank->base + bank->size) { - LOG_ERROR("Start address out of range"); - return ERROR_FAIL; - } - - offset -= bank->base; - if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; @@ -729,13 +722,6 @@ static int ath79_read(struct flash_bank *bank, uint8_t *buffer, LOG_DEBUG("%s: offset=0x%08" PRIx32 " count=0x%08" PRIx32, __func__, offset, count); - if (offset < bank->base || offset >= bank->base + bank->size) { - LOG_ERROR("Start address out of range"); - return ERROR_FAIL; - } - - offset -= bank->base; - if (target->state != TARGET_HALTED) { LOG_ERROR("Target not halted"); return ERROR_TARGET_NOT_HALTED; diff --git a/tcl/board/8devices-lima.cfg b/tcl/board/8devices-lima.cfg index 136f86197..0d35cfbc1 100644 --- a/tcl/board/8devices-lima.cfg +++ b/tcl/board/8devices-lima.cfg @@ -27,4 +27,4 @@ $_TARGETNAME configure -event reset-init { set ram_boot_address 0xa0000000 $_TARGETNAME configure -work-area-phys 0xa1FFE000 -work-area-size 0x1000 -flash bank flash0 ath79 0 0 0 0 $_TARGETNAME cs0 +flash bank flash0 ath79 0xbf000000 0 0 0 $_TARGETNAME cs0 diff --git a/tcl/board/dptechnics_dpt-board-v1.cfg b/tcl/board/dptechnics_dpt-board-v1.cfg index de31c7c09..21470b02b 100644 --- a/tcl/board/dptechnics_dpt-board-v1.cfg +++ b/tcl/board/dptechnics_dpt-board-v1.cfg @@ -29,4 +29,4 @@ $_TARGETNAME configure -event reset-init { set ram_boot_address 0xa0000000 $_TARGETNAME configure -work-area-phys 0xa1FFE000 -work-area-size 0x1000 -flash bank flash0 ath79 0 0 0 0 $_TARGETNAME cs0 +flash bank flash0 ath79 0xbf000000 0 0 0 $_TARGETNAME cs0 diff --git a/tcl/board/tp-link_tl-mr3020.cfg b/tcl/board/tp-link_tl-mr3020.cfg index 48fb69893..366bec8e1 100644 --- a/tcl/board/tp-link_tl-mr3020.cfg +++ b/tcl/board/tp-link_tl-mr3020.cfg @@ -9,4 +9,4 @@ $_TARGETNAME configure -event reset-init { set ram_boot_address 0xa0000000 $_TARGETNAME configure -work-area-phys 0xa1FFE000 -work-area-size 0x1000 -flash bank flash0 ath79 0 0 0 0 $_TARGETNAME cs0 +flash bank flash0 ath79 0xbf000000 0 0 0 $_TARGETNAME cs0 diff --git a/tcl/board/tp-link_wdr4300.cfg b/tcl/board/tp-link_wdr4300.cfg index c31791620..7aa79aba7 100644 --- a/tcl/board/tp-link_wdr4300.cfg +++ b/tcl/board/tp-link_wdr4300.cfg @@ -157,4 +157,4 @@ $_TARGETNAME configure -event reset-init { set ram_boot_address 0xa0000000 $_TARGETNAME configure -work-area-phys 0x1d000000 -work-area-size 0x1000 -flash bank flash0 ath79 0 0 0 0 $_TARGETNAME cs0 +flash bank flash0 ath79 0xbf000000 0 0 0 $_TARGETNAME cs0