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tcl/interface/ftdi: Add Digilent JTAG-HS3 config 

Derived from tcl/interface/digilent-hs1.cfg.

JTAG-HS3 has an open drain buffer on pin 14 for SRST to work with
PS_SRST_B on Xilinx Zynq SoC.

Change-Id: I1e9e72d0511528a61207e318aff937ae9fad5bf9
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2728
Tested-by: jenkins
Reviewed-by: Robert Jordens <jordens@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
__archive__
Andreas Färber 2015-04-23 12:30:39 +02:00 committed by Spencer Oliver
parent 874f0157eb
commit 8e5eaac529
1 changed files with 13 additions and 0 deletions
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13
tcl/interface/ftdi/digilent_jtag_hs3.cfg Normal file
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#
# Digilent JTAG-HS3
#
interface ftdi
ftdi_vid_pid 0x0403 0x6014
ftdi_device_desc "Digilent USB Device"
# From Digilent support:
# The SRST pin is [...] 0x20 and 0x10 is the /OE (active low output enable)
ftdi_layout_init 0x2088 0x308b
ftdi_layout_signal nSRST -data 0x2000 -noe 0x1000