Merge pull request #279 from riscv/work_area
Use work area instead of riscv-specific configriscv-compliance
Tim Newsome
GitHub
commit
8b25d2f2ee
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@ -923,22 +923,25 @@ typedef struct {
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riscv_addr_t hart_address;
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/* Memory address to access the scratch memory from the debugger. */
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riscv_addr_t debug_address;
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struct working_area *area;
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} scratch_mem_t;
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/**
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* Find some scratch memory to be used with the given program.
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*/
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static int scratch_find(struct target *target,
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static int scratch_reserve(struct target *target,
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scratch_mem_t *scratch,
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struct riscv_program *program,
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unsigned size_bytes)
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{
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riscv013_info_t *info = get_info(target);
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riscv_addr_t alignment = 1;
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while (alignment < size_bytes)
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alignment *= 2;
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scratch->area = NULL;
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riscv013_info_t *info = get_info(target);
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if (info->dataaccess == 1) {
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/* Sign extend dataaddr. */
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scratch->hart_address = info->dataaddr;
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@ -969,8 +972,9 @@ static int scratch_find(struct target *target,
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return ERROR_OK;
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}
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if (riscv_use_scratch_ram) {
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scratch->hart_address = (riscv_scratch_ram_address + alignment - 1) &
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if (target_alloc_working_area(target, size_bytes + alignment - 1,
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&scratch->area) == ERROR_OK) {
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scratch->hart_address = (scratch->area->address + alignment - 1) &
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~(alignment - 1);
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scratch->memory_space = SPACE_DMI_RAM;
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scratch->debug_address = scratch->hart_address;
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@ -978,10 +982,19 @@ static int scratch_find(struct target *target,
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}
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LOG_ERROR("Couldn't find %d bytes of scratch RAM to use. Please configure "
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"an address with 'riscv set_scratch_ram'.", size_bytes);
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"a work area with 'configure -work-area-phys'.", size_bytes);
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return ERROR_FAIL;
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}
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static int scratch_release(struct target *target,
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scratch_mem_t *scratch)
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{
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if (scratch->area)
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return target_free_working_area(target, scratch->area);
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return ERROR_OK;
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}
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static int scratch_read64(struct target *target, scratch_mem_t *scratch,
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uint64_t *value)
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{
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@ -1096,23 +1109,29 @@ static int register_write_direct(struct target *target, unsigned number,
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if (register_read(target, &s0, GDB_REGNO_S0) != ERROR_OK)
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return ERROR_FAIL;
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scratch_mem_t scratch;
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bool use_scratch = false;
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if (number >= GDB_REGNO_FPR0 && number <= GDB_REGNO_FPR31 &&
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riscv_supports_extension(target, riscv_current_hartid(target), 'D') &&
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riscv_xlen(target) < 64) {
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/* There are no instructions to move all the bits from a register, so
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* we need to use some scratch RAM. */
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use_scratch = true;
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riscv_program_insert(&program, fld(number - GDB_REGNO_FPR0, S0, 0));
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scratch_mem_t scratch;
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if (scratch_find(target, &scratch, &program, 8) != ERROR_OK)
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if (scratch_reserve(target, &scratch, &program, 8) != ERROR_OK)
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return ERROR_FAIL;
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if (register_write_direct(target, GDB_REGNO_S0, scratch.hart_address)
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!= ERROR_OK)
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!= ERROR_OK) {
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scratch_release(target, &scratch);
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return ERROR_FAIL;
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}
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if (scratch_write64(target, &scratch, value) != ERROR_OK)
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if (scratch_write64(target, &scratch, value) != ERROR_OK) {
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scratch_release(target, &scratch);
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return ERROR_FAIL;
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}
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} else {
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if (register_write_direct(target, GDB_REGNO_S0, value) != ERROR_OK)
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@ -1139,6 +1158,9 @@ static int register_write_direct(struct target *target, unsigned number,
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reg->valid = true;
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}
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if (use_scratch)
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scratch_release(target, &scratch);
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/* Restore S0. */
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if (register_write_direct(target, GDB_REGNO_S0, s0) != ERROR_OK)
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return ERROR_FAIL;
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@ -1215,13 +1237,15 @@ static int register_read_direct(struct target *target, uint64_t *value, uint32_t
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riscv_program_insert(&program, fsd(number - GDB_REGNO_FPR0, S0,
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0));
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if (scratch_find(target, &scratch, &program, 8) != ERROR_OK)
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if (scratch_reserve(target, &scratch, &program, 8) != ERROR_OK)
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return ERROR_FAIL;
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use_scratch = true;
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if (register_write_direct(target, GDB_REGNO_S0,
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scratch.hart_address) != ERROR_OK)
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scratch.hart_address) != ERROR_OK) {
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scratch_release(target, &scratch);
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return ERROR_FAIL;
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}
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} else if (riscv_supports_extension(target,
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riscv_current_hartid(target), 'D')) {
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riscv_program_insert(&program, fmv_x_d(S0, number - GDB_REGNO_FPR0));
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@ -1240,8 +1264,10 @@ static int register_read_direct(struct target *target, uint64_t *value, uint32_t
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/* Don't message on error. Probably the register doesn't exist. */
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if (use_scratch) {
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if (scratch_read64(target, &scratch, value) != ERROR_OK)
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return ERROR_FAIL;
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result = scratch_read64(target, &scratch, value);
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scratch_release(target, &scratch);
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if (result != ERROR_OK)
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return result;
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} else {
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/* Read S0 */
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if (register_read_direct(target, value, GDB_REGNO_S0) != ERROR_OK)
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@ -185,9 +185,6 @@ int riscv_command_timeout_sec = DEFAULT_COMMAND_TIMEOUT_SEC;
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/* Wall-clock timeout after reset. Settable via RISC-V Target commands.*/
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int riscv_reset_timeout_sec = DEFAULT_RESET_TIMEOUT_SEC;
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bool riscv_use_scratch_ram;
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uint64_t riscv_scratch_ram_address;
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bool riscv_prefer_sba;
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/* In addition to the ones in the standard spec, we'll also expose additional
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@ -1230,31 +1227,6 @@ COMMAND_HANDLER(riscv_set_reset_timeout_sec)
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return ERROR_OK;
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}
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COMMAND_HANDLER(riscv_set_scratch_ram)
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{
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if (CMD_ARGC != 1) {
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LOG_ERROR("Command takes exactly 1 parameter");
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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if (!strcmp(CMD_ARGV[0], "none")) {
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riscv_use_scratch_ram = false;
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return ERROR_OK;
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}
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/* TODO: use COMMAND_PARSE_NUMBER */
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long long unsigned int address;
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int result = sscanf(CMD_ARGV[0], "%llx", &address);
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if (result != (int) strlen(CMD_ARGV[0])) {
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LOG_ERROR("%s is not a valid address for command.", CMD_ARGV[0]);
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riscv_use_scratch_ram = false;
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return ERROR_FAIL;
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}
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riscv_scratch_ram_address = address;
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riscv_use_scratch_ram = true;
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return ERROR_OK;
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}
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COMMAND_HANDLER(riscv_set_prefer_sba)
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{
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if (CMD_ARGC != 1) {
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@ -1469,13 +1441,6 @@ static const struct command_registration riscv_exec_command_handlers[] = {
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.usage = "riscv set_reset_timeout_sec [sec]",
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.help = "Set the wall-clock timeout (in seconds) after reset is deasserted"
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},
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{
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.name = "set_scratch_ram",
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.handler = riscv_set_scratch_ram,
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.mode = COMMAND_ANY,
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.usage = "riscv set_scratch_ram none|[address]",
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.help = "Set address of 16 bytes of scratch RAM the debugger can use, or 'none'."
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},
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{
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.name = "set_prefer_sba",
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.handler = riscv_set_prefer_sba,
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@ -128,9 +128,6 @@ extern int riscv_command_timeout_sec;
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/* Wall-clock timeout after reset. Settable via RISC-V Target commands.*/
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extern int riscv_reset_timeout_sec;
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extern bool riscv_use_scratch_ram;
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extern uint64_t riscv_scratch_ram_address;
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extern bool riscv_prefer_sba;
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/* Everything needs the RISC-V specific info structure, so here's a nice macro
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