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- updated cortex_m3 docs regarding luminary reset behaviour 

git-svn-id: svn://svn.berlios.de/openocd/trunk@625 b42882b7-edfa-0310-969c-e2dbd0fdcd60
__archive__
ntfreak 2008-04-29 06:56:03 +00:00
parent f2e10a6050
commit 8acafd1710
4 changed files with 10 additions and 3 deletions
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7
doc/openocd.texi
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@ -596,6 +596,13 @@ ARM920t options are similar to ARM9TDMI options.
@cindex arm966e options
ARM966e options are similar to ARM9TDMI options.
@subsection cortex_m3 options
@cindex cortex_m3 options
use variant <@var{variant}> @option{lm3s} when debugging luminary lm3s targets. This will cause
openocd to use a software reset rather than asserting SRST to avoid a issue with clearing
the debug registers. This is fixed in Fury Rev B, DustDevil Rev B, Tempest, these revisions will
be detected and the normal reset behaviour used.
@subsection xscale options
@cindex xscale options
Supported variants are @option{ixp42x}, @option{ixp45x}, @option{ixp46x},

2
src/target/cortex_m3.c
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@ -710,7 +710,7 @@ int cortex_m3_assert_reset(target_t *target)
* when srst is asserted the luminary device seesm to also clear the debug registers
* which does not match the armv7 debug TRM */
if (strcmp(cortex_m3->variant, "luminary") == 0)
if (strcmp(cortex_m3->variant, "lm3s") == 0)
{
/* this causes the luminary device to reset using the watchdog */
ahbap_write_system_atomic_u32(swjdp, NVIC_AIRCR, AIRCR_VECTKEY | AIRCR_SYSRESETREQ );

2
src/target/target/lm3s6965.cfg
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@ -11,7 +11,7 @@ jtag_device 4 0x1 0xf 0xe
# the luminary variant causes a software reset rather than asserting SRST
# this stops the debug registers from being cleared
# this will be fixed in later revisions of silicon
target cortex_m3 little reset_halt 0 luminary
target cortex_m3 little reset_halt 0 lm3s
# 4k working area at base of ram
working_area 0 0x20000000 0x4000 nobackup

2
src/target/target/lm3s811.cfg
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@ -11,7 +11,7 @@ jtag_device 4 0x1 0xf 0xe
# the luminary variant causes a software reset rather than asserting SRST
# this stops the debug registers from being cleared
# this will be fixed in later revisions of silicon
target cortex_m3 little reset_halt 0 luminary
target cortex_m3 little reset_halt 0 lm3s
# 2k working area at base of ram
working_area 0 0x20000000 0x2000 nobackup