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target/cortex_a: Use 'bool' data type 

Change-Id: I055767f1c20af539159ee59e35de8dd20b399fa4
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4963
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
reverse-resume-order
Marc Schink 2019-02-26 14:08:00 +01:00 committed by Tomas Vanek
parent 5db10c0559
commit 8795090edc
1 changed files with 6 additions and 6 deletions
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12
src/target/cortex_a.c
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@ -806,15 +806,15 @@ static int cortex_a_internal_restore(struct target *target, int current,
* C_MASKINTS in parallel with disabled interrupts can cause
* local faults to not be taken. */
buf_set_u32(armv7m->core_cache->reg_list[ARMV7M_PRIMASK].value, 0, 32, 1);
armv7m->core_cache->reg_list[ARMV7M_PRIMASK].dirty = 1;
armv7m->core_cache->reg_list[ARMV7M_PRIMASK].valid = 1;
armv7m->core_cache->reg_list[ARMV7M_PRIMASK].dirty = true;
armv7m->core_cache->reg_list[ARMV7M_PRIMASK].valid = true;
/* Make sure we are in Thumb mode */
buf_set_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32,
buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0,
32) | (1 << 24));
armv7m->core_cache->reg_list[ARMV7M_xPSR].dirty = 1;
armv7m->core_cache->reg_list[ARMV7M_xPSR].valid = 1;
armv7m->core_cache->reg_list[ARMV7M_xPSR].dirty = true;
armv7m->core_cache->reg_list[ARMV7M_xPSR].valid = true;
}
#endif
@ -848,8 +848,8 @@ static int cortex_a_internal_restore(struct target *target, int current,
}
LOG_DEBUG("resume pc = 0x%08" PRIx32, resume_pc);
buf_set_u32(arm->pc->value, 0, 32, resume_pc);
arm->pc->dirty = 1;
arm->pc->valid = 1;
arm->pc->dirty = true;
arm->pc->valid = true;
/* restore dpm_mode at system halt */
arm_dpm_modeswitch(&armv7a->dpm, ARM_MODE_ANY);