armv7m: detect floating point feature
This patch add fp feature detection on cortex-m4. Change-Id: I99e9d1bf5534630a22b8ad9c878165683db2d0ba Signed-off-by: Mathias K <kesmtp@freenet.de> Reviewed-on: http://openocd.zylin.com/524 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>__archive__
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8cb4fc1420
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861df4574d
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@ -578,6 +578,7 @@ int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m)
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struct arm *arm = &armv7m->arm;
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armv7m->common_magic = ARMV7M_COMMON_MAGIC;
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armv7m->fp_feature = FP_NONE;
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arm->core_type = ARM_MODE_THREAD;
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arm->arch_info = armv7m;
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@ -97,6 +97,11 @@ enum {
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ARMV7M_LAST_REG,
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};
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enum {
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FP_NONE = 0,
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FPv4_SP,
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};
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#define ARMV7M_COMMON_MAGIC 0x2A452A45
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struct armv7m_common {
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@ -108,6 +113,8 @@ struct armv7m_common {
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int exception_number;
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struct adiv5_dap dap;
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int fp_feature;
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uint32_t demcr;
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/* Direct processor core register read and writes */
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@ -1756,13 +1756,20 @@ fail1:
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*/
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}
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#define MVFR0 0xe000ef40
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#define MVFR1 0xe000ef44
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#define MVFR0_DEFAULT_M4 0x10110021
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#define MVFR1_DEFAULT_M4 0x11000011
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int cortex_m3_examine(struct target *target)
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{
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int retval;
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uint32_t cpuid, fpcr;
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uint32_t cpuid, fpcr, mvfr0, mvfr1;
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int i;
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struct cortex_m3_common *cortex_m3 = target_to_cm3(target);
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struct adiv5_dap *swjdp = &cortex_m3->armv7m.dap;
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struct armv7m_common *armv7m = target_to_armv7m(target);
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retval = ahbap_debugport_init(swjdp);
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if (retval != ERROR_OK)
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@ -1783,6 +1790,17 @@ int cortex_m3_examine(struct target *target)
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i, (uint8_t)((cpuid >> 20) & 0xf), (uint8_t)((cpuid >> 0) & 0xf));
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LOG_DEBUG("cpuid: 0x%8.8" PRIx32 "", cpuid);
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/* test for floating point feature on cortex-m4 */
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if (i == 4) {
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target_read_u32(target, MVFR0, &mvfr0);
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target_read_u32(target, MVFR1, &mvfr1);
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if ((mvfr0 == MVFR0_DEFAULT_M4) && (mvfr1 == MVFR1_DEFAULT_M4)) {
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LOG_DEBUG("Cortex-M%d floating point feature FPv4_SP found", i);
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armv7m->fp_feature = FPv4_SP;
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}
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}
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/* NOTE: FPB and DWT are both optional. */
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/* Setup FPB */
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