armv7m: remove unused armv7m_regtype
This simplifies the armv7m_core_reg structure ready for the move to using the generic struct arm_reg. Change-Id: I8edb9d77cc54965d49cd2e754568ebcea4cf6964 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/967 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>__archive__
parent
fc2abe63fd
commit
85ed6ea59f
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@ -213,7 +213,6 @@ static int armv7m_read_core_reg(struct target *target, unsigned num)
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armv7m_core_reg = armv7m->core_cache->reg_list[num].arch_info;
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armv7m_core_reg = armv7m->core_cache->reg_list[num].arch_info;
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retval = armv7m->load_core_reg_u32(target,
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retval = armv7m->load_core_reg_u32(target,
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armv7m_core_reg->type,
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armv7m_core_reg->num,
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armv7m_core_reg->num,
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®_value);
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®_value);
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buf_set_u32(armv7m->core_cache->reg_list[num].value, 0, 32, reg_value);
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buf_set_u32(armv7m->core_cache->reg_list[num].value, 0, 32, reg_value);
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@ -236,7 +235,6 @@ static int armv7m_write_core_reg(struct target *target, unsigned num)
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reg_value = buf_get_u32(armv7m->core_cache->reg_list[num].value, 0, 32);
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reg_value = buf_get_u32(armv7m->core_cache->reg_list[num].value, 0, 32);
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armv7m_core_reg = armv7m->core_cache->reg_list[num].arch_info;
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armv7m_core_reg = armv7m->core_cache->reg_list[num].arch_info;
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retval = armv7m->store_core_reg_u32(target,
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retval = armv7m->store_core_reg_u32(target,
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armv7m_core_reg->type,
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armv7m_core_reg->num,
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armv7m_core_reg->num,
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reg_value);
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reg_value);
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if (retval != ERROR_OK) {
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if (retval != ERROR_OK) {
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@ -429,7 +427,7 @@ int armv7m_wait_algorithm(struct target *target,
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return ERROR_TARGET_TIMEOUT;
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return ERROR_TARGET_TIMEOUT;
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}
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}
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armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc);
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armv7m->load_core_reg_u32(target, 15, &pc);
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if (exit_point && (pc != exit_point)) {
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if (exit_point && (pc != exit_point)) {
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LOG_DEBUG("failed algorithm halted at 0x%" PRIx32 ", expected 0x%" PRIx32,
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LOG_DEBUG("failed algorithm halted at 0x%" PRIx32 ", expected 0x%" PRIx32,
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pc,
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pc,
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@ -43,12 +43,6 @@ extern struct reg armv7m_gdb_dummy_cpsr_reg;
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extern const int armv7m_psp_reg_map[];
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extern const int armv7m_psp_reg_map[];
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extern const int armv7m_msp_reg_map[];
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extern const int armv7m_msp_reg_map[];
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enum armv7m_regtype {
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ARMV7M_REGISTER_CORE_GP,
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ARMV7M_REGISTER_CORE_SP,
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ARMV7M_REGISTER_MEMMAP
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};
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char *armv7m_exception_string(int number);
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char *armv7m_exception_string(int number);
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/* offsets into armv7m core register cache */
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/* offsets into armv7m core register cache */
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@ -168,10 +162,8 @@ struct armv7m_common {
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bool stlink;
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bool stlink;
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/* Direct processor core register read and writes */
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/* Direct processor core register read and writes */
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int (*load_core_reg_u32)(struct target *target,
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int (*load_core_reg_u32)(struct target *target, uint32_t num, uint32_t *value);
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enum armv7m_regtype type, uint32_t num, uint32_t *value);
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int (*store_core_reg_u32)(struct target *target, uint32_t num, uint32_t value);
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int (*store_core_reg_u32)(struct target *target,
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enum armv7m_regtype type, uint32_t num, uint32_t value);
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/* register cache to processor synchronization */
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/* register cache to processor synchronization */
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int (*read_core_reg)(struct target *target, unsigned num);
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int (*read_core_reg)(struct target *target, unsigned num);
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@ -204,7 +196,6 @@ struct armv7m_algorithm {
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struct armv7m_core_reg {
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struct armv7m_core_reg {
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uint32_t num;
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uint32_t num;
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enum armv7m_regtype type;
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struct target *target;
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struct target *target;
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struct armv7m_common *armv7m_common;
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struct armv7m_common *armv7m_common;
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};
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};
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@ -61,7 +61,7 @@
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/* forward declarations */
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/* forward declarations */
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static int cortex_m3_store_core_reg_u32(struct target *target,
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static int cortex_m3_store_core_reg_u32(struct target *target,
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enum armv7m_regtype type, uint32_t num, uint32_t value);
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uint32_t num, uint32_t value);
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static int cortexm3_dap_read_coreregister_u32(struct adiv5_dap *swjdp,
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static int cortexm3_dap_read_coreregister_u32(struct adiv5_dap *swjdp,
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uint32_t *value, int regnum)
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uint32_t *value, int regnum)
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@ -446,7 +446,7 @@ static int cortex_m3_debug_entry(struct target *target)
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/* For IT instructions xPSR must be reloaded on resume and clear on debug exec */
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/* For IT instructions xPSR must be reloaded on resume and clear on debug exec */
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if (xPSR & 0xf00) {
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if (xPSR & 0xf00) {
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r->dirty = r->valid;
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r->dirty = r->valid;
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cortex_m3_store_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 16, xPSR & ~0xff);
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cortex_m3_store_core_reg_u32(target, 16, xPSR & ~0xff);
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}
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}
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/* Are we in an exception handler */
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/* Are we in an exception handler */
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@ -1464,7 +1464,7 @@ void cortex_m3_enable_watchpoints(struct target *target)
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}
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}
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static int cortex_m3_load_core_reg_u32(struct target *target,
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static int cortex_m3_load_core_reg_u32(struct target *target,
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enum armv7m_regtype type, uint32_t num, uint32_t *value)
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uint32_t num, uint32_t *value)
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{
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{
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int retval;
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int retval;
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struct armv7m_common *armv7m = target_to_armv7m(target);
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struct armv7m_common *armv7m = target_to_armv7m(target);
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@ -1525,7 +1525,7 @@ static int cortex_m3_load_core_reg_u32(struct target *target,
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}
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}
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static int cortex_m3_store_core_reg_u32(struct target *target,
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static int cortex_m3_store_core_reg_u32(struct target *target,
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enum armv7m_regtype type, uint32_t num, uint32_t value)
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uint32_t num, uint32_t value)
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{
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{
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int retval;
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int retval;
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uint32_t reg;
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uint32_t reg;
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@ -47,7 +47,6 @@ static inline struct hl_interface_s *target_to_adapter(struct target *target)
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}
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}
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static int adapter_load_core_reg_u32(struct target *target,
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static int adapter_load_core_reg_u32(struct target *target,
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enum armv7m_regtype type,
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uint32_t num, uint32_t *value)
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uint32_t num, uint32_t *value)
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{
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{
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int retval;
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int retval;
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@ -144,7 +143,6 @@ static int adapter_load_core_reg_u32(struct target *target,
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}
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}
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static int adapter_store_core_reg_u32(struct target *target,
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static int adapter_store_core_reg_u32(struct target *target,
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enum armv7m_regtype type,
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uint32_t num, uint32_t value)
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uint32_t num, uint32_t value)
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{
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{
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int retval;
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int retval;
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