cortex a8: add missing error handling for cortex_a8_dap_write/read_coreregister_u32()
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>__archive__
parent
a2d5b0ef77
commit
8249261b88
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@ -180,8 +180,12 @@ static int cortex_a8_read_regs_through_mem(struct target *target, uint32_t addre
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct adiv5_dap *swjdp = &armv7a->dap;
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cortex_a8_dap_read_coreregister_u32(target, regfile, 0);
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cortex_a8_dap_write_coreregister_u32(target, address, 0);
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retval = cortex_a8_dap_read_coreregister_u32(target, regfile, 0);
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if (retval != ERROR_OK)
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return retval;
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retval = cortex_a8_dap_write_coreregister_u32(target, address, 0);
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if (retval != ERROR_OK)
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return retval;
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retval = cortex_a8_exec_opcode(target, ARMV4_5_STMIA(0, 0xFFFE, 0, 0), NULL);
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if (retval != ERROR_OK)
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return retval;
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@ -965,7 +969,9 @@ static int cortex_a8_debug_entry(struct target *target)
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target_free_working_area(target, regfile_working_area);
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/* read Current PSR */
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cortex_a8_dap_read_coreregister_u32(target, &cpsr, 16);
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retval = cortex_a8_dap_read_coreregister_u32(target, &cpsr, 16);
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if (retval != ERROR_OK)
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return retval;
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dap_ap_select(swjdp, swjdp_debugap);
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LOG_DEBUG("cpsr: %8.8" PRIx32, cpsr);
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