From 81f9e0a0bce7a3446949d9280208a6f9e9b13bcf Mon Sep 17 00:00:00 2001 From: ntfreak Date: Mon, 20 Apr 2009 22:38:27 +0000 Subject: [PATCH] - fix at91rm9200 warning. Thanks Zach Welch - add missing svn props from previous commit git-svn-id: svn://svn.berlios.de/openocd/trunk@1478 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/jtag/at91rm9200.c | 2 +- src/target/target/lpc2124.cfg | 76 +++++++++++++-------------- src/target/target/lpc2378.cfg | 98 +++++++++++++++++------------------ 3 files changed, 88 insertions(+), 88 deletions(-) diff --git a/src/jtag/at91rm9200.c b/src/jtag/at91rm9200.c index 17523d871..dce7c7cd2 100644 --- a/src/jtag/at91rm9200.c +++ b/src/jtag/at91rm9200.c @@ -104,7 +104,7 @@ struct device_t struct device_t devices[] = { { "rea_ecr", PIOD, P27, PIOA, NC, PIOD, P23, PIOD, P24, PIOD, P26, PIOC, P5 }, - { NULL, 0 } + { .name = NULL }, }; /* configuration */ diff --git a/src/target/target/lpc2124.cfg b/src/target/target/lpc2124.cfg index f8d7e8f64..c780664d2 100644 --- a/src/target/target/lpc2124.cfg +++ b/src/target/target/lpc2124.cfg @@ -1,38 +1,38 @@ -#LPC-2124 CPU - -if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME -} else { - set _CHIPNAME lpc2124 -} - -if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN -} else { - set _ENDIAN little -} - -if { [info exists CPUTAPID ] } { - set _CPUTAPID $CPUTAPID -} else { - # force an error till we get a good number - set _CPUTAPID 0x4f1f0f0f -} - - -#use combined on interfaces or targets that can't set TRST/SRST separately -reset_config trst_and_srst srst_pulls_trst -jtag_nsrst_delay 10 -jtag_khz 1000 - -#jtag scan chain -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID - -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] -target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 - -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 - - -#flash bank -flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14745 calc_checksum +#LPC-2124 CPU + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lpc2124 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + # force an error till we get a good number + set _CPUTAPID 0x4f1f0f0f +} + + +#use combined on interfaces or targets that can't set TRST/SRST separately +reset_config trst_and_srst srst_pulls_trst +jtag_nsrst_delay 10 +jtag_khz 1000 + +#jtag scan chain +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +set _TARGETNAME [format "%s.cpu" $_CHIPNAME] +target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 + +$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0 + + +#flash bank +flash bank lpc2000 0x0 0x40000 0 0 0 lpc2000_v1 14745 calc_checksum diff --git a/src/target/target/lpc2378.cfg b/src/target/target/lpc2378.cfg index 386fae072..16232383e 100644 --- a/src/target/target/lpc2378.cfg +++ b/src/target/target/lpc2378.cfg @@ -1,49 +1,49 @@ -# NXP LPC2378 ARM7TDMI-S with 512kB Flash and 32kB Local On-Chip SRAM (58kB total), clocked with 4MHz internal RC oscillator - -if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME -} else { - set _CHIPNAME lpc2378 -} - -if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN -} else { - set _ENDIAN little -} - -if { [info exists CPUTAPID ] } { - set _CPUTAPID $CPUTAPID -} else { - set _CPUTAPID 0x4f1f0f0f -} - -#delays on reset lines -jtag_nsrst_delay 200 -jtag_ntrst_delay 200 - -# LPC2000 -> SRST causes TRST -reset_config trst_and_srst srst_pulls_trst - -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID - -set _TARGETNAME [format "%s.cpu" $_CHIPNAME] -target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 - -# LPC2378 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM) -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x8000 -work-area-backup 0 - -$_TARGETNAME configure -event reset-init { - # Force target into ARM state - soft_reset_halt - #do not remap 0x0000-0x0020 to anything but the flash - mwb 0xE01FC040 0x01 -} - -# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader. -# After reset the chip uses its internal 4MHz RC oscillator -#flash bank lpc2000 0 0 -flash bank lpc2000 0x0 0x0007D000 0 0 0 lpc2000_v2 4000 calc_checksum - -# 4MHz / 6 = 666kHz, so use 500 -jtag_khz 500 +# NXP LPC2378 ARM7TDMI-S with 512kB Flash and 32kB Local On-Chip SRAM (58kB total), clocked with 4MHz internal RC oscillator + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME lpc2378 +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x4f1f0f0f +} + +#delays on reset lines +jtag_nsrst_delay 200 +jtag_ntrst_delay 200 + +# LPC2000 -> SRST causes TRST +reset_config trst_and_srst srst_pulls_trst + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +set _TARGETNAME [format "%s.cpu" $_CHIPNAME] +target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4 + +# LPC2378 has 32kB of SRAM on its main system bus (so-called Local On-Chip SRAM) +$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x8000 -work-area-backup 0 + +$_TARGETNAME configure -event reset-init { + # Force target into ARM state + soft_reset_halt + #do not remap 0x0000-0x0020 to anything but the flash + mwb 0xE01FC040 0x01 +} + +# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader. +# After reset the chip uses its internal 4MHz RC oscillator +#flash bank lpc2000 0 0 +flash bank lpc2000 0x0 0x0007D000 0 0 0 lpc2000_v2 4000 calc_checksum + +# 4MHz / 6 = 666kHz, so use 500 +jtag_khz 500