- split str71x driver into banks
- support new str91x/str9xpec devices - update target scripts and docs for changes git-svn-id: svn://svn.berlios.de/openocd/trunk@577 b42882b7-edfa-0310-969c-e2dbd0fdcd60__archive__
ntfreak
parent
53c41935cd
commit
80d20326a7
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@ -35,7 +35,7 @@
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#include <string.h>
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#include <unistd.h>
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str7x_mem_layout_t mem_layout[] = {
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str7x_mem_layout_t mem_layout_str7bank0[] = {
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{0x00000000, 0x02000, 0x01},
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{0x00002000, 0x02000, 0x02},
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{0x00004000, 0x02000, 0x04},
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@ -43,9 +43,12 @@ str7x_mem_layout_t mem_layout[] = {
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{0x00008000, 0x08000, 0x10},
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{0x00010000, 0x10000, 0x20},
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{0x00020000, 0x10000, 0x40},
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{0x00030000, 0x10000, 0x80},
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{0x000C0000, 0x02000, 0x10000},
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{0x000C2000, 0x02000, 0x20000},
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{0x00030000, 0x10000, 0x80}
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};
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str7x_mem_layout_t mem_layout_str7bank1[] = {
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{0x00000000, 0x02000, 0x10000},
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{0x00002000, 0x02000, 0x20000}
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};
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int str7x_register_commands(struct command_context_s *cmd_ctx);
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@ -87,7 +90,8 @@ int str7x_register_commands(struct command_context_s *cmd_ctx)
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int str7x_get_flash_adr(struct flash_bank_s *bank, u32 reg)
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{
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return (bank->base | reg);
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str7x_flash_bank_t *str7x_info = bank->driver_priv;
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return (str7x_info->register_base | reg);
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}
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int str7x_build_block_list(struct flash_bank_s *bank)
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@ -95,12 +99,13 @@ int str7x_build_block_list(struct flash_bank_s *bank)
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str7x_flash_bank_t *str7x_info = bank->driver_priv;
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int i;
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int num_sectors = 0, b0_sectors = 0, b1_sectors = 0;
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int num_sectors;
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int b0_sectors = 0, b1_sectors = 0;
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switch (bank->size)
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{
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case 16 * 1024:
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b0_sectors = 2;
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b1_sectors = 2;
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break;
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case 64 * 1024:
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b0_sectors = 5;
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@ -115,42 +120,31 @@ int str7x_build_block_list(struct flash_bank_s *bank)
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LOG_ERROR("BUG: unknown bank->size encountered");
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exit(-1);
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}
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if( str7x_info->bank1 == 1 )
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{
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b1_sectors += 2;
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}
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num_sectors = b0_sectors + b1_sectors;
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bank->num_sectors = num_sectors;
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bank->sectors = malloc(sizeof(flash_sector_t) * num_sectors);
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str7x_info->sector_bits = malloc(sizeof(u32) * num_sectors);
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str7x_info->sector_bank = malloc(sizeof(u32) * num_sectors);
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num_sectors = 0;
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for (i = 0; i < b0_sectors; i++)
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{
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bank->sectors[num_sectors].offset = mem_layout[i].sector_start;
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bank->sectors[num_sectors].size = mem_layout[i].sector_size;
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bank->sectors[num_sectors].offset = mem_layout_str7bank0[i].sector_start;
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bank->sectors[num_sectors].size = mem_layout_str7bank0[i].sector_size;
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bank->sectors[num_sectors].is_erased = -1;
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bank->sectors[num_sectors].is_protected = 1;
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str7x_info->sector_bank[num_sectors] = 0;
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str7x_info->sector_bits[num_sectors++] = mem_layout[i].sector_bit;
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str7x_info->sector_bits[num_sectors++] = mem_layout_str7bank0[i].sector_bit;
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}
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if (b1_sectors)
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for (i = 0; i < b1_sectors; i++)
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{
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for (i = 8; i < 10; i++)
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{
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bank->sectors[num_sectors].offset = mem_layout[i].sector_start;
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bank->sectors[num_sectors].size = mem_layout[i].sector_size;
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bank->sectors[num_sectors].is_erased = -1;
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bank->sectors[num_sectors].is_protected = 1;
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str7x_info->sector_bank[num_sectors] = 1;
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str7x_info->sector_bits[num_sectors++] = mem_layout[i].sector_bit;
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}
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bank->sectors[num_sectors].offset = mem_layout_str7bank1[i].sector_start;
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bank->sectors[num_sectors].size = mem_layout_str7bank1[i].sector_size;
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bank->sectors[num_sectors].is_erased = -1;
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bank->sectors[num_sectors].is_protected = 1;
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str7x_info->sector_bits[num_sectors++] = mem_layout_str7bank1[i].sector_bit;
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}
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return ERROR_OK;
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@ -172,38 +166,22 @@ int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char
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bank->driver_priv = str7x_info;
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/* set default bits for str71x flash */
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str7x_info->bank1 = 1;
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str7x_info->busy_bits = (FLASH_LOCK|FLASH_BSYA1|FLASH_BSYA0);
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str7x_info->disable_bit = (1<<1);
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if (strcmp(args[6], "STR71x") == 0)
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{
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if (bank->base != 0x40000000)
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{
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LOG_WARNING("overriding flash base address for STR71x device with 0x40000000");
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bank->base = 0x40000000;
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}
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str7x_info->register_base = 0x40100000;
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}
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else if (strcmp(args[6], "STR73x") == 0)
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{
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str7x_info->bank1 = 0;
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str7x_info->register_base = 0x80100000;
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str7x_info->busy_bits = (FLASH_LOCK|FLASH_BSYA0);
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if (bank->base != 0x80000000)
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{
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LOG_WARNING("overriding flash base address for STR73x device with 0x80000000");
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bank->base = 0x80000000;
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}
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}
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else if (strcmp(args[6], "STR75x") == 0)
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{
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str7x_info->register_base = 0x20100000;
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str7x_info->disable_bit = (1<<0);
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if (bank->base != 0x20000000)
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{
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LOG_WARNING("overriding flash base address for STR75x device with 0x20000000");
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bank->base = 0x20000000;
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}
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}
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else
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{
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@ -239,7 +217,6 @@ u32 str7x_result(struct flash_bank_s *bank)
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return retval;
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}
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int str7x_protect_check(struct flash_bank_s *bank)
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{
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str7x_flash_bank_t *str7x_info = bank->driver_priv;
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@ -274,7 +251,7 @@ int str7x_erase(struct flash_bank_s *bank, int first, int last)
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int i;
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u32 cmd;
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u32 retval;
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u32 b0_sectors = 0, b1_sectors = 0;
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u32 sectors = 0;
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if (bank->target->state != TARGET_HALTED)
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{
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@ -283,70 +260,33 @@ int str7x_erase(struct flash_bank_s *bank, int first, int last)
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for (i = first; i <= last; i++)
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{
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if (str7x_info->sector_bank[i] == 0)
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b0_sectors |= str7x_info->sector_bits[i];
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else if (str7x_info->sector_bank[i] == 1)
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b1_sectors |= str7x_info->sector_bits[i];
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else
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LOG_ERROR("BUG: str7x_info->sector_bank[i] neither 0 nor 1 (%i)", str7x_info->sector_bank[i]);
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sectors |= str7x_info->sector_bits[i];
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}
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if (b0_sectors)
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{
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LOG_DEBUG("b0_sectors: 0x%x", b0_sectors);
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/* clear FLASH_ER register */
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0);
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cmd = FLASH_SER;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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cmd = b0_sectors;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd);
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cmd = FLASH_SER|FLASH_WMS;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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while (((retval = str7x_status(bank)) & str7x_info->busy_bits)){
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usleep(1000);
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}
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retval = str7x_result(bank);
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if (retval)
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{
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LOG_ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval);
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return ERROR_FLASH_OPERATION_FAILED;
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}
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LOG_DEBUG("sectors: 0x%x", sectors);
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/* clear FLASH_ER register */
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0);
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cmd = FLASH_SER;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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cmd = sectors;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd);
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cmd = FLASH_SER|FLASH_WMS;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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while (((retval = str7x_status(bank)) & str7x_info->busy_bits)){
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usleep(1000);
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}
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if (b1_sectors)
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retval = str7x_result(bank);
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if (retval)
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{
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LOG_DEBUG("b1_sectors: 0x%x", b1_sectors);
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/* clear FLASH_ER register */
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0);
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cmd = FLASH_SER;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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cmd = b1_sectors;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd);
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cmd = FLASH_SER|FLASH_WMS;
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target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
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while (((retval = str7x_status(bank)) & str7x_info->busy_bits)){
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usleep(1000);
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}
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retval = str7x_result(bank);
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if (retval)
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{
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LOG_ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval);
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return ERROR_FLASH_OPERATION_FAILED;
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}
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LOG_ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval);
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return ERROR_FLASH_OPERATION_FAILED;
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}
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for (i = first; i <= last; i++)
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@ -25,11 +25,10 @@
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typedef struct str7x_flash_bank_s
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{
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int bank1;
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u32 *sector_bank;
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u32 *sector_bits;
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u32 disable_bit;
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u32 busy_bits;
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u32 register_base;
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working_area_t *write_algorithm;
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} str7x_flash_bank_t;
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@ -51,15 +50,15 @@ enum str7x_status_codes
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/* Flash registers */
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#define FLASH_CR0 0x00100000
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#define FLASH_CR1 0x00100004
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#define FLASH_DR0 0x00100008
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#define FLASH_DR1 0x0010000C
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#define FLASH_AR 0x00100010
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#define FLASH_ER 0x00100014
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#define FLASH_NVWPAR 0x0010DFB0
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#define FLASH_NVAPR0 0x0010DFB8
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#define FLASH_NVAPR1 0x0010DFBC
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#define FLASH_CR0 0x00000000
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#define FLASH_CR1 0x00000004
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#define FLASH_DR0 0x00000008
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#define FLASH_DR1 0x0000000C
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#define FLASH_AR 0x00000010
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#define FLASH_ER 0x00000014
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#define FLASH_NVWPAR 0x0000DFB0
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#define FLASH_NVAPR0 0x0000DFB8
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#define FLASH_NVAPR1 0x0000DFBC
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/* FLASH_CR0 register bits */
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@ -36,24 +36,6 @@
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#include <string.h>
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#include <unistd.h>
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str9x_mem_layout_t mem_layout_str9bank0[] = {
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{0x00000000, 0x10000, 0x01},
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{0x00010000, 0x10000, 0x02},
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{0x00020000, 0x10000, 0x04},
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{0x00030000, 0x10000, 0x08},
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{0x00040000, 0x10000, 0x10},
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{0x00050000, 0x10000, 0x20},
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{0x00060000, 0x10000, 0x40},
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{0x00070000, 0x10000, 0x80},
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};
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str9x_mem_layout_t mem_layout_str9bank1[] = {
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{0x00000000, 0x02000, 0x100},
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{0x00002000, 0x02000, 0x200},
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{0x00004000, 0x02000, 0x400},
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{0x00006000, 0x02000, 0x800}
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};
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static u32 bank1start = 0x00080000;
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int str9x_register_commands(struct command_context_s *cmd_ctx);
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@ -98,9 +80,14 @@ int str9x_build_block_list(struct flash_bank_s *bank)
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str9x_flash_bank_t *str9x_info = bank->driver_priv;
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int i;
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int num_sectors = 0;
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int num_sectors;
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int b0_sectors = 0, b1_sectors = 0;
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u32 offset = 0;
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/* set if we have large flash str9 */
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str9x_info->variant = 0;
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str9x_info->bank1 = 0;
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switch (bank->size)
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{
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case (256 * 1024):
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@ -109,7 +96,24 @@ int str9x_build_block_list(struct flash_bank_s *bank)
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case (512 * 1024):
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b0_sectors = 8;
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break;
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case (1024 * 1024):
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bank1start = 0x00100000;
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str9x_info->variant = 1;
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b0_sectors = 16;
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break;
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case (2048 * 1024):
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bank1start = 0x00200000;
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str9x_info->variant = 1;
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b0_sectors = 32;
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break;
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case (128 * 1024):
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str9x_info->variant = 1;
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str9x_info->bank1 = 1;
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b1_sectors = 8;
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bank1start = bank->base;
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break;
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case (32 * 1024):
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str9x_info->bank1 = 1;
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b1_sectors = 4;
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bank1start = bank->base;
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break;
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@ -128,20 +132,25 @@ int str9x_build_block_list(struct flash_bank_s *bank)
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for (i = 0; i < b0_sectors; i++)
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{
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bank->sectors[num_sectors].offset = mem_layout_str9bank0[i].sector_start;
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bank->sectors[num_sectors].size = mem_layout_str9bank0[i].sector_size;
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bank->sectors[num_sectors].offset = offset;
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bank->sectors[num_sectors].size = 0x10000;
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offset += bank->sectors[i].size;
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bank->sectors[num_sectors].is_erased = -1;
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bank->sectors[num_sectors].is_protected = 1;
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str9x_info->sector_bits[num_sectors++] = mem_layout_str9bank0[i].sector_bit;
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str9x_info->sector_bits[num_sectors++] = (1<<i);
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}
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for (i = 0; i < b1_sectors; i++)
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{
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bank->sectors[num_sectors].offset = mem_layout_str9bank1[i].sector_start;
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bank->sectors[num_sectors].size = mem_layout_str9bank1[i].sector_size;
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bank->sectors[num_sectors].offset = offset;
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bank->sectors[num_sectors].size = str9x_info->variant == 0 ? 0x2000 : 0x4000;
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offset += bank->sectors[i].size;
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bank->sectors[num_sectors].is_erased = -1;
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bank->sectors[num_sectors].is_protected = 1;
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str9x_info->sector_bits[num_sectors++] = mem_layout_str9bank1[i].sector_bit;
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if (str9x_info->variant)
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str9x_info->sector_bits[num_sectors++] = (1<<i);
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else
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str9x_info->sector_bits[num_sectors++] = (1<<(i+8));
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}
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return ERROR_OK;
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@ -176,7 +185,7 @@ int str9x_protect_check(struct flash_bank_s *bank)
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int i;
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u32 adr;
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u16 status;
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u32 status = 0;
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if (bank->target->state != TARGET_HALTED)
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{
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@ -185,10 +194,28 @@ int str9x_protect_check(struct flash_bank_s *bank)
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/* read level one protection */
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adr = bank1start + 0x10;
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if (str9x_info->variant)
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{
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if (str9x_info->bank1)
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{
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adr = bank1start + 0x18;
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target_write_u16(target, adr, 0x90);
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target_read_u16(target, adr, (u16*)&status);
|
||||
}
|
||||
else
|
||||
{
|
||||
adr = bank1start + 0x14;
|
||||
target_write_u16(target, adr, 0x90);
|
||||
target_read_u32(target, adr, &status);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
adr = bank1start + 0x10;
|
||||
target_write_u16(target, adr, 0x90);
|
||||
target_read_u16(target, adr, (u16*)&status);
|
||||
}
|
||||
|
||||
target_write_u16(target, adr, 0x90);
|
||||
target_read_u16(target, adr, &status);
|
||||
target_write_u16(target, adr, 0xFF);
|
||||
|
||||
for (i = 0; i < bank->num_sectors; i++)
|
||||
|
|
|
|||
|
|
@ -26,6 +26,8 @@
|
|||
typedef struct str9x_flash_bank_s
|
||||
{
|
||||
u32 *sector_bits;
|
||||
int variant;
|
||||
int bank1;
|
||||
working_area_t *write_algorithm;
|
||||
} str9x_flash_bank_t;
|
||||
|
||||
|
|
@ -55,11 +57,5 @@ enum str9x_status_codes
|
|||
#define FLASH_SR 0x5400001C /* Status Register */
|
||||
#define FLASH_BCE5ADDR 0x54000020 /* BC Fifth Entry Target Address Register */
|
||||
|
||||
typedef struct str9x_mem_layout_s {
|
||||
u32 sector_start;
|
||||
u32 sector_size;
|
||||
u32 sector_bit;
|
||||
} str9x_mem_layout_t;
|
||||
|
||||
#endif /* STR9X_H */
|
||||
|
||||
|
|
|
|||
|
|
@ -37,21 +37,6 @@
|
|||
#include <unistd.h>
|
||||
#include <getopt.h>
|
||||
|
||||
str9xpec_mem_layout_t mem_layout_str9pec[] = {
|
||||
{0x00000000, 0x10000, 0},
|
||||
{0x00010000, 0x10000, 1},
|
||||
{0x00020000, 0x10000, 2},
|
||||
{0x00030000, 0x10000, 3},
|
||||
{0x00040000, 0x10000, 4},
|
||||
{0x00050000, 0x10000, 5},
|
||||
{0x00060000, 0x10000, 6},
|
||||
{0x00070000, 0x10000, 7},
|
||||
{0x00080000, 0x02000, 32},
|
||||
{0x00082000, 0x02000, 33},
|
||||
{0x00084000, 0x02000, 34},
|
||||
{0x00086000, 0x02000, 35}
|
||||
};
|
||||
|
||||
int str9xpec_register_commands(struct command_context_s *cmd_ctx);
|
||||
int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
|
||||
int str9xpec_erase(struct flash_bank_s *bank, int first, int last);
|
||||
|
|
@ -279,8 +264,11 @@ int str9xpec_build_block_list(struct flash_bank_s *bank)
|
|||
str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
|
||||
|
||||
int i;
|
||||
int num_sectors = 0, b0_sectors = 0;
|
||||
|
||||
int num_sectors;
|
||||
int b0_sectors = 0, b1_sectors = 0;
|
||||
u32 offset = 0;
|
||||
int b1_size = 0x2000;
|
||||
|
||||
switch (bank->size)
|
||||
{
|
||||
case (256 * 1024):
|
||||
|
|
@ -289,14 +277,25 @@ int str9xpec_build_block_list(struct flash_bank_s *bank)
|
|||
case (512 * 1024):
|
||||
b0_sectors = 8;
|
||||
break;
|
||||
case (1024 * 1024):
|
||||
b0_sectors = 16;
|
||||
break;
|
||||
case (2048 * 1024):
|
||||
b0_sectors = 32;
|
||||
break;
|
||||
case (128 * 1024):
|
||||
b1_size = 0x4000;
|
||||
b1_sectors = 8;
|
||||
break;
|
||||
case (32 * 1024):
|
||||
b1_sectors = 4;
|
||||
break;
|
||||
default:
|
||||
LOG_ERROR("BUG: unknown bank->size encountered");
|
||||
exit(-1);
|
||||
}
|
||||
|
||||
/* include bank 1 sectors */
|
||||
num_sectors = b0_sectors + 4;
|
||||
bank->size += (32 * 1024);
|
||||
num_sectors = b0_sectors + b1_sectors;
|
||||
|
||||
bank->num_sectors = num_sectors;
|
||||
bank->sectors = malloc(sizeof(flash_sector_t) * num_sectors);
|
||||
|
|
@ -306,22 +305,24 @@ int str9xpec_build_block_list(struct flash_bank_s *bank)
|
|||
|
||||
for (i = 0; i < b0_sectors; i++)
|
||||
{
|
||||
bank->sectors[num_sectors].offset = mem_layout_str9pec[i].sector_start;
|
||||
bank->sectors[num_sectors].size = mem_layout_str9pec[i].sector_size;
|
||||
bank->sectors[num_sectors].offset = offset;
|
||||
bank->sectors[num_sectors].size = 0x10000;
|
||||
offset += bank->sectors[i].size;
|
||||
bank->sectors[num_sectors].is_erased = -1;
|
||||
bank->sectors[num_sectors].is_protected = 1;
|
||||
str9xpec_info->sector_bits[num_sectors++] = mem_layout_str9pec[i].sector_bit;
|
||||
str9xpec_info->sector_bits[num_sectors++] = i;
|
||||
}
|
||||
|
||||
for (i = 8; i < 12; i++)
|
||||
|
||||
for (i = 0; i < b1_sectors; i++)
|
||||
{
|
||||
bank->sectors[num_sectors].offset = mem_layout_str9pec[i].sector_start;
|
||||
bank->sectors[num_sectors].size = mem_layout_str9pec[i].sector_size;
|
||||
bank->sectors[num_sectors].offset = offset;
|
||||
bank->sectors[num_sectors].size = b1_size;
|
||||
offset += bank->sectors[i].size;
|
||||
bank->sectors[num_sectors].is_erased = -1;
|
||||
bank->sectors[num_sectors].is_protected = 1;
|
||||
str9xpec_info->sector_bits[num_sectors++] = mem_layout_str9pec[i].sector_bit;
|
||||
str9xpec_info->sector_bits[num_sectors++] = i + 32;
|
||||
}
|
||||
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
|
|
@ -343,12 +344,6 @@ int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, ch
|
|||
str9xpec_info = malloc(sizeof(str9xpec_flash_controller_t));
|
||||
bank->driver_priv = str9xpec_info;
|
||||
|
||||
if (bank->base != 0x00000000)
|
||||
{
|
||||
LOG_WARNING("overriding flash base address for STR91x device with 0x00000000");
|
||||
bank->base = 0x00000000;
|
||||
}
|
||||
|
||||
/* find out jtag position of flash controller
|
||||
* it is always after the arm966 core */
|
||||
|
||||
|
|
|
|||
|
|
@ -66,12 +66,6 @@ enum str9xpec_status_codes
|
|||
#define ISC_STATUS_BUSY 0x04
|
||||
#define ISC_STATUS_ERROR 0x03
|
||||
|
||||
typedef struct mem_layout_str9pec {
|
||||
u32 sector_start;
|
||||
u32 sector_size;
|
||||
u32 sector_bit;
|
||||
} str9xpec_mem_layout_t;
|
||||
|
||||
/* Option bytes definitions */
|
||||
|
||||
#define STR9XPEC_OPT_CSMAPBIT 48
|
||||
|
|
|
|||
|
|
@ -1,22 +1,5 @@
|
|||
mww 0xFFFFFD44, 0x00008000 #Disable watchdog
|
||||
mww 0xFFFFFC20, 0x00000601 #Enable Main oscillator
|
||||
sleep 20
|
||||
mww 0xFFFFFC30, 0x00000001 #Switch master clock to CPU clock, write 1 to PMC_MCKR
|
||||
sleep 20
|
||||
|
||||
|
||||
# -- Remap Flash Bank 0 at address 0x0 and Bank 1 at address 0x80000,
|
||||
# when the bank 0 is the boot bank, then enable the Bank 1. */
|
||||
|
||||
mww 0x54000000, 0x4 #BOOT BANK Size = (2^4) * 32 = 512KB
|
||||
mww 0x54000004, 0x2 #NON BOOT BANK Size = (2^2) * 8 = 32KB
|
||||
mww 0x5400000C, 0x0 #BOOT BANK Address = 0x0
|
||||
mww 0x54000010, 0x20000 #NON BOOT BANK Address = 0x80000
|
||||
mww 0x54000018, 0x18 #Enable CS on both banks
|
||||
|
||||
# -- Enable 96K RAM */
|
||||
mww 0x5C002034, 0x0191 # PFQBC enabled / DTCM & AHB wait-states disabled
|
||||
arm966e cp15 15, 0x60000 #Set bits 17-18 (DTCM/ITCM order bits) of the Core Configuration Control Register
|
||||
|
||||
str9x flash_config 0 4 2 0 0x80000
|
||||
flash protect 0 0 7 off
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@ run_and_halt_time 0 30
|
|||
working_area 0 0x20000000 16384 nobackup
|
||||
|
||||
#flash bank str7x <base> <size> 0 0 <target#> <variant>
|
||||
flash bank stm32x 0x00000000 0x00000000 0 0 0
|
||||
flash bank stm32x 0 0 0 0 0
|
||||
|
||||
# For more information about the configuration files, take a look at:
|
||||
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
|
||||
|
|
|
|||
|
|
@ -19,6 +19,7 @@ working_area 0 0x2000C000 0x4000 nobackup
|
|||
|
||||
#flash bank str7x <base> <size> 0 0 <target#> <variant>
|
||||
flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x
|
||||
flash bank str7x 0x400C0000 0x00004000 0 0 0 STR71x
|
||||
|
||||
# For more information about the configuration files, take a look at:
|
||||
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
|
||||
|
|
|
|||
|
|
@ -19,8 +19,9 @@ target_script 0 reset event/str912_reset.script
|
|||
|
||||
working_area 0 0x50000000 16384 nobackup
|
||||
|
||||
#flash bank str7x <base> <size> 0 0 <target#> <variant>
|
||||
#flash bank str9x <base> <size> 0 0 <target#> <variant>
|
||||
flash bank str9x 0x00000000 0x00080000 0 0 0
|
||||
flash bank str9x 0x00080000 0x00008000 0 0 0
|
||||
|
||||
# For more information about the configuration files, take a look at:
|
||||
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
|
||||
|
|
|
|||
Loading…
Reference in New Issue