zy1000: tweak the DCC inner loop a tiny bit
Uses FIFO a bit more efficiently now. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>__archive__
parent
1d9fba8c14
commit
7e447043cd
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@ -839,7 +839,7 @@ void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer,
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int post_bits;
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int post_bits;
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jtag_pre_post_bits(tap, &pre_bits, &post_bits);
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jtag_pre_post_bits(tap, &pre_bits, &post_bits);
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if ((pre_bits > 32) || (post_bits > 32))
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if (pre_bits + post_bits + 6 > 32)
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{
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{
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int i;
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int i;
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for (i = 0; i < count; i++)
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for (i = 0; i < count; i++)
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@ -854,15 +854,18 @@ void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer,
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if (post_bits == 0)
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if (post_bits == 0)
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shift_end_state = end_state;
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shift_end_state = end_state;
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int i;
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for (i = 0; i < count; i++)
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{
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shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
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shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
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int i;
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for (i = 0; i < count - 1; i++)
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{
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/* Fewer pokes means we get to use the FIFO more efficiently */
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shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
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shiftValueInner(TAP_DRSHIFT, shift_end_state, 6 + post_bits + pre_bits, (reg_addr | (1 << 5)));
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buffer += 4;
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}
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shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
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shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
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shiftValueInner(TAP_DRSHIFT, shift_end_state, 6, reg_addr | (1 << 5));
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shiftValueInner(TAP_DRSHIFT, shift_end_state, 6, reg_addr | (1 << 5));
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shiftValueInner(shift_end_state, end_state, post_bits, 0);
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shiftValueInner(shift_end_state, end_state, post_bits, 0);
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buffer += 4;
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}
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}
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}
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}
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}
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