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aarch64: improve debug output 

Make debug and error messages more informative, fix spelling and
formatting errors

Change-Id: I7245f42c5153bcc95676270814d30e91c113aaed
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
gitignore-build
Matthias Welwarsky 2016-10-20 16:59:21 +02:00
parent 822ebda674
commit 7d537dc8e9
2 changed files with 9 additions and 9 deletions
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7
src/target/aarch64.c
View File

@ -389,7 +389,7 @@ static int aarch64_poll(struct target *target)
if (DSCR_RUN_MODE(dscr) == 0x3) {
if (prev_target_state != TARGET_HALTED) {
/* We have a halting debug event */
LOG_DEBUG("Target halted");
LOG_DEBUG("Target %s halted", target_name(target));
target->state = TARGET_HALTED;
if ((prev_target_state == TARGET_RUNNING)
|| (prev_target_state == TARGET_UNKNOWN)
@ -839,13 +839,12 @@ static int aarch64_restore_context(struct target *target, bool bpwp)
{
struct armv8_common *armv8 = target_to_armv8(target);
LOG_DEBUG(" ");
LOG_DEBUG("%s", target_name(target));
if (armv8->pre_restore_context)
armv8->pre_restore_context(target);
return armv8_dpm_write_dirty_registers(&armv8->dpm, bpwp);
}
/*
@ -1369,6 +1368,7 @@ static int aarch64_write_apb_ap_memory(struct target *target,
LOG_DEBUG("Writing APB-AP memory address 0x%" PRIx64 " size %" PRIu32 " count %" PRIu32,
address, size, count);
if (target->state != TARGET_HALTED) {
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
@ -1519,6 +1519,7 @@ static int aarch64_read_apb_ap_memory(struct target *target,
LOG_DEBUG("Reading APB-AP memory address 0x%" TARGET_PRIxADDR " size %" PRIu32 " count %" PRIu32,
address, size, count);
if (target->state != TARGET_HALTED) {
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;

7
src/target/armv8_dpm.c
View File

@ -79,8 +79,7 @@ static int dpmv8_write_dcc(struct armv8_common *armv8, uint32_t data)
static int dpmv8_write_dcc_64(struct armv8_common *armv8, uint64_t data)
{
int ret;
LOG_DEBUG("write DCC Low word 0x%08" PRIx32, (unsigned)data);
LOG_DEBUG("write DCC High word 0x%08" PRIx32, (unsigned)(data >> 32));
LOG_DEBUG("write DCC 0x%016" PRIx64, data);
ret = mem_ap_write_u32(armv8->debug_ap,
armv8->debug_base + CPUV8_DBG_DTRRX, data);
ret += mem_ap_write_u32(armv8->debug_ap,
@ -143,7 +142,7 @@ static int dpmv8_read_dcc_64(struct armv8_common *armv8, uint64_t *data,
if (retval != ERROR_OK)
return retval;
if (timeval_ms() > then + 1000) {
LOG_ERROR("Timeout waiting for read dcc");
LOG_ERROR("Timeout waiting for DTR_TX_FULL, dscr = 0x%08" PRIx32, dscr);
return ERROR_FAIL;
}
}
@ -1305,7 +1304,7 @@ void armv8_dpm_report_wfar(struct arm_dpm *dpm, uint64_t addr)
/* ?? */
break;
default:
LOG_DEBUG("Unknow core_state");
LOG_DEBUG("Unknown core_state");
break;
}
dpm->wp_pc = addr;