commit
79329f21a3
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@ -122,6 +122,7 @@ typedef enum slot {
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/*** Info about the core being debugged. ***/
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#define WALL_CLOCK_TIMEOUT 2
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#define WALL_CLOCK_RESET_TIMEOUT 30
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struct trigger {
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uint64_t address;
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@ -199,6 +200,14 @@ static void decode_dmi(char *text, unsigned address, unsigned data)
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uint64_t mask;
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const char *name;
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} description[] = {
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{ DMI_DMCONTROL, DMI_DMCONTROL_HALTREQ, "haltreq" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_RESUMEREQ, "resumereq" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_HARTRESET, "hartreset" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_HASEL, "hasel" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_HARTSEL, "hartsel" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_NDMRESET, "ndmreset" },
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{ DMI_DMCONTROL, DMI_DMCONTROL_DMACTIVE, "dmactive" },
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{ DMI_DMSTATUS, DMI_DMSTATUS_ALLRESUMEACK, "allresumeack" },
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{ DMI_DMSTATUS, DMI_DMSTATUS_ANYRESUMEACK, "anyresumeack" },
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{ DMI_DMSTATUS, DMI_DMSTATUS_ALLNONEXISTENT, "allnonexistent" },
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@ -1874,7 +1883,19 @@ void riscv013_reset_current_hart(struct target *target)
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control = set_field(control, DMI_DMCONTROL_NDMRESET, 0);
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dmi_write(target, DMI_DMCONTROL, control);
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while (get_field(dmi_read(target, DMI_DMSTATUS), DMI_DMSTATUS_ALLHALTED) == 0);
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time_t start = time(NULL);
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while (1) {
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uint32_t dmstatus = dmi_read(target, DMI_DMSTATUS);
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if (get_field(dmstatus, DMI_DMSTATUS_ALLHALTED)) {
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break;
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}
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if (time(NULL) - start > WALL_CLOCK_RESET_TIMEOUT) {
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LOG_ERROR("Hart didn't halt coming out of reset in %ds; "
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"dmstatus=0x%x", WALL_CLOCK_RESET_TIMEOUT, dmstatus);
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return;
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}
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}
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control = set_field(control, DMI_DMCONTROL_HALTREQ, 0);
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dmi_write(target, DMI_DMCONTROL, control);
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