Factor out checking if harts should be used
Rather than having a bunch of "if rtos" stuff, I now just check "if hart_enabled". This makes some code paths cleaner, all of which were buggy in the non-RTOS multi-hart mode.autoconf
parent
9f4cac5a38
commit
788908fcf0
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@ -1143,6 +1143,9 @@ static int examine(struct target *target)
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/* Find the address of the program buffer, which must be done without
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* knowing anything about the target. */
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for (int i = 0; i < riscv_count_harts(target); ++i) {
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if (!riscv_hart_enabled(target, i))
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continue;
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riscv_set_current_hartid(target, i);
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/* Without knowing anything else we can at least mess with the
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@ -1213,6 +1216,9 @@ static int examine(struct target *target)
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/* Then we check the number of triggers availiable to each hart. */
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for (int i = 0; i < riscv_count_harts(target); ++i) {
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if (!riscv_hart_enabled(target, i))
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continue;
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for (uint32_t t = 0; t < RISCV_MAX_TRIGGERS; ++t) {
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riscv_set_current_hartid(target, i);
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@ -890,11 +890,11 @@ void riscv_info_init(struct target *target, riscv_info_t *r)
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int riscv_halt_all_harts(struct target *target)
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{
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if (riscv_rtos_enabled(target)) {
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for (int i = 0; i < riscv_count_harts(target); ++i)
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riscv_halt_one_hart(target, i);
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} else {
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riscv_halt_one_hart(target, riscv_current_hartid(target));
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for (int i = 0; i < riscv_count_harts(target); ++i) {
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if (!riscv_hart_enabled(target, i))
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continue;
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riscv_halt_one_hart(target, i);
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}
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return ERROR_OK;
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@ -916,11 +916,11 @@ int riscv_halt_one_hart(struct target *target, int hartid)
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int riscv_resume_all_harts(struct target *target)
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{
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if (riscv_rtos_enabled(target)) {
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for (int i = 0; i < riscv_count_harts(target); ++i)
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riscv_resume_one_hart(target, i);
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} else {
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riscv_resume_one_hart(target, riscv_current_hartid(target));
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for (int i = 0; i < riscv_count_harts(target); ++i) {
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if (!riscv_hart_enabled(target, i))
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continue;
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riscv_resume_one_hart(target, i);
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}
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riscv_invalidate_register_cache(target);
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@ -944,11 +944,11 @@ int riscv_resume_one_hart(struct target *target, int hartid)
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int riscv_reset_all_harts(struct target *target)
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{
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if (riscv_rtos_enabled(target)) {
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for (int i = 0; i < riscv_count_harts(target); ++i)
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riscv_reset_one_hart(target, i);
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} else {
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riscv_reset_one_hart(target, riscv_current_hartid(target));
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for (int i = 0; i < riscv_count_harts(target); ++i) {
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if (!riscv_hart_enabled(target, i))
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continue;
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riscv_reset_one_hart(target, i);
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}
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riscv_invalidate_register_cache(target);
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@ -1018,10 +1018,9 @@ void riscv_set_current_hartid(struct target *target, int hartid)
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int previous_hartid = riscv_current_hartid(target);
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r->current_hartid = hartid;
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assert(riscv_rtos_enabled(target) || target->coreid == hartid);
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assert(riscv_hart_enabled(target, hartid));
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LOG_DEBUG("setting hartid to %d, was %d", hartid, previous_hartid);
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if (riscv_rtos_enabled(target))
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r->select_current_hart(target);
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r->select_current_hart(target);
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/* This might get called during init, in which case we shouldn't be
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* setting up the register cache. */
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@ -1234,3 +1233,12 @@ int riscv_dmi_write_u64_bits(struct target *target)
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RISCV_INFO(r);
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return r->dmi_write_u64_bits(target);
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}
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bool riscv_hart_enabled(struct target *target, int hartid)
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{
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/* FIXME: Add a hart mask to the RTOS. */
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if (riscv_rtos_enabled(target))
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return hartid < riscv_count_harts(target);
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return hartid == target->coreid;
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}
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@ -215,4 +215,7 @@ int riscv_dmi_write_u64_bits(struct target *target);
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/* Invalidates the register cache. */
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void riscv_invalidate_register_cache(struct target *target);
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/* Returns TRUE when a hart is enabled in this target. */
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bool riscv_hart_enabled(struct target *target, int hartid);
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#endif
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