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target: "dap info" command cosmetic output changes 

This makes the listing easier to read, imho. The tab indentation
technique causes the base address to precess as the parser proceeds
through the subtables, and can easily wrap.

Change-Id: Iea5e678255e6314a9d532e4b222a2572b5394390
Signed-off-by: Brad Riensche <brad.riensche@gmail.com>
Reviewed-on: http://openocd.zylin.com/1518
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
__archive__
Brad Riensche 2013-07-22 10:22:08 -05:00 committed by Andreas Fritiofson
parent 623eb336cf
commit 77aecd5376
1 changed files with 15 additions and 18 deletions
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33
src/target/arm_adi_v5.c
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@ -1031,17 +1031,15 @@ static int dap_rom_display(struct command_context *cmd_ctx,
int retval; int retval;
uint32_t cid0, cid1, cid2, cid3, memtype, romentry; uint32_t cid0, cid1, cid2, cid3, memtype, romentry;
uint16_t entry_offset; uint16_t entry_offset;
int i; char tabs[7] = "";
char tabs[16 + 1];
if (depth > 16) { if (depth > 16) {
command_print(cmd_ctx, "\tTables too deep"); command_print(cmd_ctx, "\tTables too deep");
return ERROR_FAIL; return ERROR_FAIL;
} }
for (i = 0; i < depth; ++i) if (depth)
tabs[i] = '\t'; snprintf(tabs, sizeof(tabs), "[L%02d] ", depth);
tabs[i] = '\0';
/* bit 16 of apid indicates a memory access port */ /* bit 16 of apid indicates a memory access port */
if (dbgbase & 0x02) if (dbgbase & 0x02)
@ -1140,12 +1138,12 @@ static int dap_rom_display(struct command_context *cmd_ctx,
return retval; return retval;
c_cid3 &= 0xff; c_cid3 &= 0xff;
command_print(cmd_ctx, "\t%s\tComponent base address 0x%" PRIx32 ", " command_print(cmd_ctx, "\t\tComponent base address 0x%" PRIx32 ", "
"start address 0x%" PRIx32, tabs, component_base, "start address 0x%" PRIx32, component_base,
/* component may take multiple 4K pages */ /* component may take multiple 4K pages */
(uint32_t)(component_base - 0x1000*(c_pid4 >> 4))); (uint32_t)(component_base - 0x1000*(c_pid4 >> 4)));
command_print(cmd_ctx, "\t%s\tComponent class is 0x%x, %s", command_print(cmd_ctx, "\t\tComponent class is 0x%x, %s",
tabs, (c_cid1 >> 4) & 0xf, (c_cid1 >> 4) & 0xf,
/* See ARM IHI 0029B Table 3-3 */ /* See ARM IHI 0029B Table 3-3 */
class_description[(c_cid1 >> 4) & 0xf]); class_description[(c_cid1 >> 4) & 0xf]);
@ -1256,26 +1254,25 @@ static int dap_rom_display(struct command_context *cmd_ctx,
} }
break; break;
} }
command_print(cmd_ctx, "\t%s\tType is 0x%02x, %s, %s", command_print(cmd_ctx, "\t\tType is 0x%02x, %s, %s",
tabs, devtype & 0xff, devtype & 0xff,
major, subtype); major, subtype);
/* REVISIT also show 0xfc8 DevId */ /* REVISIT also show 0xfc8 DevId */
} }
if (!is_dap_cid_ok(cid3, cid2, cid1, cid0)) if (!is_dap_cid_ok(cid3, cid2, cid1, cid0))
command_print(cmd_ctx, command_print(cmd_ctx,
"\t%s\tCID3 0%02x" "\t\tCID3 0%02x"
", CID2 0%02x" ", CID2 0%02x"
", CID1 0%02x" ", CID1 0%02x"
", CID0 0%02x", ", CID0 0%02x",
tabs,
(int)c_cid3, (int)c_cid3,
(int)c_cid2, (int)c_cid2,
(int)c_cid1, (int)c_cid1,
(int)c_cid0); (int)c_cid0);
command_print(cmd_ctx, command_print(cmd_ctx,
"\t%s\tPeripheral ID[4..0] = hex " "\t\tPeripheral ID[4..0] = hex "
"%02x %02x %02x %02x %02x", tabs, "%02x %02x %02x %02x %02x",
(int)c_pid4, (int)c_pid3, (int)c_pid2, (int)c_pid4, (int)c_pid3, (int)c_pid2,
(int)c_pid1, (int)c_pid0); (int)c_pid1, (int)c_pid0);
@ -1386,8 +1383,8 @@ static int dap_rom_display(struct command_context *cmd_ctx,
full = ""; full = "";
break; break;
} }
command_print(cmd_ctx, "\t%s\tPart is %s %s", command_print(cmd_ctx, "\t\tPart is %s %s",
tabs, type, full); type, full);
/* ROM Table? */ /* ROM Table? */
if (((c_cid1 >> 4) & 0x0f) == 1) { if (((c_cid1 >> 4) & 0x0f) == 1) {
@ -1397,7 +1394,7 @@ static int dap_rom_display(struct command_context *cmd_ctx,
} }
} else { } else {
if (romentry) if (romentry)
command_print(cmd_ctx, "\t%s\tComponent not present", tabs); command_print(cmd_ctx, "\t\tComponent not present");
else else
break; break;
} }