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tinyriscv-openocd
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David Claffey <dnclaffey@gmail.com> get rid of reset recursion 

git-svn-id: svn://svn.berlios.de/openocd/trunk@2664 b42882b7-edfa-0310-969c-e2dbd0fdcd60
__archive__
oharboe 2009-09-04 05:14:32 +00:00
parent a89dd2ca65
commit 76b78feef1
1 changed files with 4 additions and 3 deletions
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7
tcl/target/ar71xx.cfg
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@ -13,16 +13,17 @@ jtag newtap $CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id 1
set TARGETNAME [format "%s.cpu" $CHIPNAME] set TARGETNAME [format "%s.cpu" $CHIPNAME]
target create $TARGETNAME mips_m4k -endian big -chain-position $TARGETNAME target create $TARGETNAME mips_m4k -endian big -chain-position $TARGETNAME
$TARGETNAME configure -event reset-init { $TARGETNAME configure -event reset-halt-post {
#setup PLL to lowest common denominator 300/300/150 setting #setup PLL to lowest common denominator 300/300/150 setting
mww 0xb8050000 0x000f40a3 # reset val + CPU:3 DDR:3 AHB:0 mww 0xb8050000 0x000f40a3 # reset val + CPU:3 DDR:3 AHB:0
mww 0xb8050000 0x800f40a3 # send to PLL mww 0xb8050000 0x800f40a3 # send to PLL
#next command will reset for PLL changes to take effect #next command will reset for PLL changes to take effect
mww 0xb8050008 3 # set reset_switch and clock_switch (resets SoC) mww 0xb8050008 3 # set reset_switch and clock_switch (resets SoC)
reset halt # let openocd know that it is in the reset state }
#initialize_pll $TARGETNAME configure -event reset-init {
#complete pll initialization
mww 0xb8050000 0x800f0080 # set sw_update bit mww 0xb8050000 0x800f0080 # set sw_update bit
mww 0xb8050008 0 # clear reset_switch bit mww 0xb8050008 0 # clear reset_switch bit
mww 0xb8050000 0x800f00e8 # clr pwrdwn & bypass mww 0xb8050000 0x800f00e8 # clr pwrdwn & bypass