ARM: fix single-step of Thumb unconditional branch
Only type 1 branch instruction has a condition code, not type 2. Currently they're both tagged with ARM_B which doesn't allow for the distinction. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>__archive__
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76afa936ba
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@ -317,8 +317,8 @@ int arm_simulate_step_core(target_t *target, uint32_t *dry_run_pc, struct arm_si
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return retval;
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instruction_size = 2;
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/* check condition code (only for branch instructions) */
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if (instruction.type == ARM_B &&
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/* check condition code (only for branch (1) instructions) */
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if ((opcode & 0xf000) == 0xd000 &&
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!thumb_pass_branch_condition(sim->get_cpsr(sim, 0, 32), opcode))
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{
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if (dry_run_pc)
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