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mips: Added #define for scan_delay legacy mode default value 

Believe in using defines to make maintenance easier.

Change-Id: I8edf151352131bbf2b884dfcd67ca5764b11b13c
Signed-off-by: Kent Brinkley <jkbrinkley.imgtec@gmail.com>
Reviewed-on: http://openocd.zylin.com/2350
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
gitignore-build
Kent Brinkley 2014-10-21 07:46:30 -07:00 committed by Spencer Oliver
parent 5108fb591b
commit 727f178ab9
3 changed files with 5 additions and 3 deletions
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4
src/target/mips32.c
View File

@ -384,7 +384,7 @@ int mips32_init_arch_info(struct target *target, struct mips32_common *mips32, s
mips32->read_core_reg = mips32_read_core_reg;
mips32->write_core_reg = mips32_write_core_reg;
mips32->ejtag_info.scan_delay = 2000000; /* Initial default value */
mips32->ejtag_info.scan_delay = MIPS32_SCAN_DELAY_LEGACY_MODE; /* Initial default value */
mips32->ejtag_info.mode = 0; /* Initial default value */
return ERROR_OK;
@ -911,7 +911,7 @@ COMMAND_HANDLER(mips32_handle_scan_delay_command)
return ERROR_COMMAND_SYNTAX_ERROR;
command_print(CMD_CTX, "scan delay: %d nsec", ejtag_info->scan_delay);
if (ejtag_info->scan_delay >= 2000000) {
if (ejtag_info->scan_delay >= MIPS32_SCAN_DELAY_LEGACY_MODE) {
ejtag_info->mode = 0;
command_print(CMD_CTX, "running in legacy mode");
} else {

2
src/target/mips32.h
View File

@ -61,6 +61,8 @@
#define MIPS32_ARCH_REL1 0x0
#define MIPS32_ARCH_REL2 0x1
#define MIPS32_SCAN_DELAY_LEGACY_MODE 2000000
/* offsets into mips32 core register cache */
enum {
MIPS32_PC = 37,

2
src/target/mips_m4k.c
View File

@ -1339,7 +1339,7 @@ COMMAND_HANDLER(mips_m4k_handle_scan_delay_command)
return ERROR_COMMAND_SYNTAX_ERROR;
command_print(CMD_CTX, "scan delay: %d nsec", ejtag_info->scan_delay);
if (ejtag_info->scan_delay >= 2000000) {
if (ejtag_info->scan_delay >= MIPS32_SCAN_DELAY_LEGACY_MODE) {
ejtag_info->mode = 0;
command_print(CMD_CTX, "running in legacy mode");
} else {