counter*h registers only exist on RV32
Fixes #245. Change-Id: If05ec9773dc9975931434f09c431eba122a6e8d0riscv-compliance-dev
parent
292180fb44
commit
67b4e2c522
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@ -2381,6 +2381,72 @@ int riscv_init_registers(struct target *target)
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r->exist = riscv_supports_extension(target, riscv_current_hartid(target), 'S') ||
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r->exist = riscv_supports_extension(target, riscv_current_hartid(target), 'S') ||
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riscv_supports_extension(target, riscv_current_hartid(target), 'N');
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riscv_supports_extension(target, riscv_current_hartid(target), 'N');
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break;
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break;
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case CSR_CYCLEH:
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case CSR_TIMEH:
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case CSR_INSTRETH:
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case CSR_HPMCOUNTER3H:
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case CSR_HPMCOUNTER4H:
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case CSR_HPMCOUNTER5H:
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case CSR_HPMCOUNTER6H:
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case CSR_HPMCOUNTER7H:
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case CSR_HPMCOUNTER8H:
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case CSR_HPMCOUNTER9H:
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case CSR_HPMCOUNTER10H:
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case CSR_HPMCOUNTER11H:
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case CSR_HPMCOUNTER12H:
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case CSR_HPMCOUNTER13H:
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case CSR_HPMCOUNTER14H:
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case CSR_HPMCOUNTER15H:
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case CSR_HPMCOUNTER16H:
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case CSR_HPMCOUNTER17H:
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case CSR_HPMCOUNTER18H:
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case CSR_HPMCOUNTER19H:
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case CSR_HPMCOUNTER20H:
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case CSR_HPMCOUNTER21H:
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case CSR_HPMCOUNTER22H:
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case CSR_HPMCOUNTER23H:
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case CSR_HPMCOUNTER24H:
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case CSR_HPMCOUNTER25H:
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case CSR_HPMCOUNTER26H:
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case CSR_HPMCOUNTER27H:
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case CSR_HPMCOUNTER28H:
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case CSR_HPMCOUNTER29H:
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case CSR_HPMCOUNTER30H:
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case CSR_HPMCOUNTER31H:
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case CSR_MCYCLEH:
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case CSR_MINSTRETH:
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case CSR_MHPMCOUNTER3H:
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case CSR_MHPMCOUNTER4H:
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case CSR_MHPMCOUNTER5H:
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case CSR_MHPMCOUNTER6H:
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case CSR_MHPMCOUNTER7H:
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case CSR_MHPMCOUNTER8H:
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case CSR_MHPMCOUNTER9H:
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case CSR_MHPMCOUNTER10H:
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case CSR_MHPMCOUNTER11H:
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case CSR_MHPMCOUNTER12H:
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case CSR_MHPMCOUNTER13H:
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case CSR_MHPMCOUNTER14H:
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case CSR_MHPMCOUNTER15H:
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case CSR_MHPMCOUNTER16H:
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case CSR_MHPMCOUNTER17H:
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case CSR_MHPMCOUNTER18H:
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case CSR_MHPMCOUNTER19H:
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case CSR_MHPMCOUNTER20H:
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case CSR_MHPMCOUNTER21H:
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case CSR_MHPMCOUNTER22H:
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case CSR_MHPMCOUNTER23H:
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case CSR_MHPMCOUNTER24H:
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case CSR_MHPMCOUNTER25H:
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case CSR_MHPMCOUNTER26H:
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case CSR_MHPMCOUNTER27H:
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case CSR_MHPMCOUNTER28H:
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case CSR_MHPMCOUNTER29H:
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case CSR_MHPMCOUNTER30H:
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case CSR_MHPMCOUNTER31H:
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r->exist = riscv_xlen(target) == 32;
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break;
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}
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}
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if (!r->exist && expose_csr) {
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if (!r->exist && expose_csr) {
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