zcy
/
tinyriscv-openocd
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

riscv: In FESPI driver, rename 'wip' to 'tx_wait', a more descriptive name.

__archive__
Megan Wachs 2016-11-14 16:14:39 -08:00
parent 8de4ab011d
commit 6686e71bd6
1 changed files with 34 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

40
src/flash/nor/fespi.c
View File

@ -198,7 +198,7 @@ static int fespi_set_dir (struct flash_bank * bank, bool dir) {
} }
static int fespi_flush(struct flash_bank *bank) { static int fespi_txwm_wait(struct flash_bank *bank) {
struct target *target = bank->target; struct target *target = bank->target;
struct fespi_flash_bank *fespi_info = bank->driver_priv; struct fespi_flash_bank *fespi_info = bank->driver_priv;
uint32_t ctrl_base = fespi_info->ctrl_base; uint32_t ctrl_base = fespi_info->ctrl_base;
@ -241,7 +241,6 @@ static int fespi_wip (struct flash_bank * bank, int timeout) {
int64_t endtime; int64_t endtime;
fespi_set_dir(bank, FESPI_DIR_RX); fespi_set_dir(bank, FESPI_DIR_RX);
FESPI_WRITE_REG(FESPI_REG_CSMODE, FESPI_CSMODE_HOLD); FESPI_WRITE_REG(FESPI_REG_CSMODE, FESPI_CSMODE_HOLD);
@ -276,7 +275,7 @@ static int fespi_erase_sector(struct flash_bank *bank, int sector)
int retval; int retval;
fespi_tx(bank, SPIFLASH_WRITE_ENABLE); fespi_tx(bank, SPIFLASH_WRITE_ENABLE);
fespi_flush(bank); fespi_txwm_wait(bank);
FESPI_WRITE_REG(FESPI_REG_CSMODE, FESPI_CSMODE_HOLD); FESPI_WRITE_REG(FESPI_REG_CSMODE, FESPI_CSMODE_HOLD);
fespi_tx(bank, fespi_info->dev->erase_cmd); fespi_tx(bank, fespi_info->dev->erase_cmd);
@ -284,7 +283,7 @@ static int fespi_erase_sector(struct flash_bank *bank, int sector)
fespi_tx(bank, sector >> 16); fespi_tx(bank, sector >> 16);
fespi_tx(bank, sector >> 8); fespi_tx(bank, sector >> 8);
fespi_tx(bank, sector); fespi_tx(bank, sector);
fespi_flush(bank); fespi_txwm_wait(bank);
FESPI_WRITE_REG(FESPI_REG_CSMODE, FESPI_CSMODE_AUTO); FESPI_WRITE_REG(FESPI_REG_CSMODE, FESPI_CSMODE_AUTO);
retval = fespi_wip(bank, FESPI_MAX_TIMEOUT); retval = fespi_wip(bank, FESPI_MAX_TIMEOUT);
@ -326,6 +325,16 @@ static int fespi_erase(struct flash_bank *bank, int first, int last)
} }
} }
fespi_txwm_wait(bank);
/* Disable Hardware accesses*/
FESPI_DISABLE_HW_MODE();
/* poll WIP */
retval = fespi_wip(bank, FESPI_PROBE_TIMEOUT);
if (retval != ERROR_OK)
return retval;
for (sector = first; sector <= last; sector++) { for (sector = first; sector <= last; sector++) {
retval = fespi_erase_sector(bank, sector); retval = fespi_erase_sector(bank, sector);
if (retval != ERROR_OK) if (retval != ERROR_OK)
@ -349,7 +358,6 @@ static int fespi_protect(struct flash_bank *bank, int set,
} }
/* This should write something less than or equal to a page.*/ /* This should write something less than or equal to a page.*/
static int fespi_write_buffer(struct flash_bank *bank, const uint8_t *buffer, static int fespi_write_buffer(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t len) uint32_t offset, uint32_t len)
{ {
@ -364,8 +372,14 @@ static int fespi_write_buffer(struct flash_bank *bank, const uint8_t *buffer,
LOG_DEBUG("%s: offset=0x%08" PRIx32 " len=0x%08" PRIx32, LOG_DEBUG("%s: offset=0x%08" PRIx32 " len=0x%08" PRIx32,
__func__, offset, len); __func__, offset, len);
printf("%s: offset=0x%08" PRIx32 " len=0x%08" PRIx32,
__func__, offset, len);
fespi_tx(bank, SPIFLASH_WRITE_ENABLE); fespi_tx(bank, SPIFLASH_WRITE_ENABLE);
fespi_flush(bank); fespi_txwm_wait(bank);
FESPI_WRITE_REG(FESPI_REG_CSMODE, FESPI_CSMODE_HOLD); FESPI_WRITE_REG(FESPI_REG_CSMODE, FESPI_CSMODE_HOLD);
@ -379,7 +393,7 @@ static int fespi_write_buffer(struct flash_bank *bank, const uint8_t *buffer,
fespi_tx(bank, buffer[ii]); fespi_tx(bank, buffer[ii]);
} }
fespi_flush(bank); fespi_txwm_wait(bank);
FESPI_WRITE_REG(FESPI_REG_CSMODE, FESPI_CSMODE_AUTO); FESPI_WRITE_REG(FESPI_REG_CSMODE, FESPI_CSMODE_AUTO);
@ -424,6 +438,16 @@ static int fespi_write(struct flash_bank *bank, const uint8_t *buffer,
page_size = fespi_info->dev->pagesize; page_size = fespi_info->dev->pagesize;
fespi_txwm_wait(bank);
/* Disable Hardware accesses*/
FESPI_DISABLE_HW_MODE();
/* poll WIP */
retval = fespi_wip(bank, FESPI_PROBE_TIMEOUT);
if (retval != ERROR_OK)
return retval;
/* unaligned buffer head */ /* unaligned buffer head */
if (count > 0 && (offset & 3) != 0) { if (count > 0 && (offset & 3) != 0) {
cur_count = 4 - (offset & 3); cur_count = 4 - (offset & 3);
@ -484,7 +508,7 @@ static int fespi_write(struct flash_bank *bank, const uint8_t *buffer,
return ERROR_TARGET_NOT_HALTED; return ERROR_TARGET_NOT_HALTED;
} }
fespi_flush(bank); fespi_txwm_wait(bank);
/* Disable Hardware accesses*/ /* Disable Hardware accesses*/
FESPI_DISABLE_HW_MODE(); FESPI_DISABLE_HW_MODE();