Merge pull request #99 from riscv/cast
Remove some unnecessary casts.eclipse_multicore_fix v20170818
commit
66806aa70d
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@ -1319,7 +1319,7 @@ static int read_memory(struct target *target, target_addr_t address,
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}
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}
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uint32_t value = riscv_program_read_ram(&program, r_data);
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uint32_t value = riscv_program_read_ram(&program, r_data);
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LOG_DEBUG("M[0x%" TARGET_PRIxADDR "] reads 0x%08lx", address, (long)value);
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LOG_DEBUG("M[0x%" TARGET_PRIxADDR "] reads 0x%08x", address, value);
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switch (size) {
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switch (size) {
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case 1:
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case 1:
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buffer[0] = value;
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buffer[0] = value;
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@ -1466,7 +1466,7 @@ static int read_memory(struct target *target, target_addr_t address,
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return ERROR_FAIL;
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return ERROR_FAIL;
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}
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}
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LOG_DEBUG("M[0x%08lx] reads 0x%08lx", (long)t_addr, (long)value);
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LOG_DEBUG("M[0x%08lx] reads 0x%08x", (long)t_addr, value);
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}
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}
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riscv_batch_free(batch);
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riscv_batch_free(batch);
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}
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}
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@ -1555,7 +1555,7 @@ static int write_memory(struct target *target, target_addr_t address,
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}
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}
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riscv_program_write_ram(&program, r_data, value);
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riscv_program_write_ram(&program, r_data, value);
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LOG_DEBUG("M[0x%08lx] writes 0x%08lx", (long)address, (long)value);
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LOG_DEBUG("M[0x%08lx] writes 0x%08x", (long)address, value);
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if (riscv_program_exec(&program, target) != ERROR_OK) {
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if (riscv_program_exec(&program, target) != ERROR_OK) {
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uint32_t acs = dmi_read(target, DMI_ABSTRACTCS);
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uint32_t acs = dmi_read(target, DMI_ABSTRACTCS);
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@ -1615,7 +1615,7 @@ static int write_memory(struct target *target, target_addr_t address,
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return ERROR_FAIL;
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return ERROR_FAIL;
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}
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}
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LOG_DEBUG("M[0x%08lx] writes 0x%08lx", (long)t_addr, (long)value);
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LOG_DEBUG("M[0x%08lx] writes 0x%08x", (long)t_addr, value);
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riscv_batch_add_dmi_write(
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riscv_batch_add_dmi_write(
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batch,
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batch,
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