Cleanup: removal of obsolete semicolons
Obsolete C source code semicolons were removed using the semantic patch semicolon/semicolon.cocci, see coccinellery.org Change-Id: I153b4995a9e028ebaf5f58c947821dc78345a777 Signed-off-by: Alexander Kurz <akurz@blala.de> Reviewed-on: http://openocd.zylin.com/3367 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>__archive__
parent
144f96c35a
commit
6581bf5f15
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@ -1275,7 +1275,6 @@ static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer,
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LOG_WARNING("No working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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;
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/* write algorithm code to working area */
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retval = target_write_buffer(target, write_algorithm->address,
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@ -1297,7 +1296,6 @@ static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer,
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goto cleanup;
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}
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}
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;
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/* setup algo registers */
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init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
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@ -1540,7 +1538,6 @@ static int cfi_spansion_write_block_mips(struct flash_bank *bank, const uint8_t
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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}
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;
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init_reg_param(®_params[0], "r4", 32, PARAM_OUT);
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init_reg_param(®_params[1], "r5", 32, PARAM_OUT);
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@ -1920,7 +1917,6 @@ static int cfi_spansion_write_block(struct flash_bank *bank, const uint8_t *buff
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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}
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;
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init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
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init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
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@ -668,7 +668,7 @@ static int efm32x_write_block(struct flash_bank *bank, const uint8_t *buf,
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&write_algorithm) != ERROR_OK) {
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LOG_WARNING("no working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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}
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ret = target_write_buffer(target, write_algorithm->address,
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sizeof(efm32x_flash_write_code), efm32x_flash_write_code);
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@ -687,7 +687,7 @@ static int efm32x_write_block(struct flash_bank *bank, const uint8_t *buf,
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LOG_WARNING("no large enough working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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};
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}
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init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */
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init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (word-32bit) */
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@ -502,7 +502,6 @@ static int em357_write_block(struct flash_bank *bank, const uint8_t *buffer,
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LOG_WARNING("no working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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;
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retval = target_write_buffer(target, write_algorithm->address,
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sizeof(em357_flash_write_code), em357_flash_write_code);
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@ -1160,7 +1160,6 @@ static int lpc2900_write(struct flash_bank *bank, const uint8_t *buffer,
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break;
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}
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}
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;
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if (warea) {
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struct reg_param reg_params[5];
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@ -698,7 +698,7 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer,
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" a working area > %zdB in order to write to SPIFI flash.",
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sizeof(lpcspifi_flash_write_code));
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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}
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retval = target_write_buffer(target, write_algorithm->address,
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sizeof(lpcspifi_flash_write_code),
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@ -734,7 +734,7 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer,
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if (target_alloc_working_area(target, fifo_size, &fifo) != ERROR_OK) {
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target_free_working_area(target, write_algorithm);
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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}
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armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
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armv7m_info.core_mode = ARM_MODE_THREAD;
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@ -255,7 +255,7 @@ static int mdr_write_block(struct flash_bank *bank, const uint8_t *buffer,
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&write_algorithm) != ERROR_OK) {
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LOG_WARNING("no working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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}
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retval = target_write_buffer(target, write_algorithm->address,
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sizeof(mdr32fx_flash_write_code), mdr32fx_flash_write_code);
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@ -274,7 +274,7 @@ static int mdr_write_block(struct flash_bank *bank, const uint8_t *buffer,
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LOG_WARNING("no large enough working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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};
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}
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init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */
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init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (32bit) */
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@ -680,7 +680,7 @@ static int mrvlqspi_flash_write(struct flash_bank *bank, const uint8_t *buffer,
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" a working area > %zdB in order to write to SPIFI flash.",
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sizeof(mrvlqspi_flash_write_code));
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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}
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retval = target_write_buffer(target, write_algorithm->address,
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sizeof(mrvlqspi_flash_write_code),
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@ -714,7 +714,7 @@ static int mrvlqspi_flash_write(struct flash_bank *bank, const uint8_t *buffer,
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if (target_alloc_working_area(target, fifo_size, &fifo) != ERROR_OK) {
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target_free_working_area(target, write_algorithm);
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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}
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armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
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armv7m_info.core_mode = ARM_MODE_THREAD;
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@ -1299,7 +1299,7 @@ static int niietcm4_write_block(struct flash_bank *bank, const uint8_t *buffer,
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&write_algorithm) != ERROR_OK) {
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LOG_WARNING("no working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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}
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retval = target_write_buffer(target, write_algorithm->address,
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sizeof(niietcm4_flash_write_code), niietcm4_flash_write_code);
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@ -1319,7 +1319,7 @@ static int niietcm4_write_block(struct flash_bank *bank, const uint8_t *buffer,
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LOG_WARNING("no large enough working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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};
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}
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init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* write_cmd base (in), status (out) */
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init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (128bit) */
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@ -587,7 +587,7 @@ static int nrf51_protect(struct flash_bank *bank, int set, int first, int last)
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if ((ppfc & 0xFF) == 0x00) {
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LOG_ERROR("Code region 0 size was pre-programmed at the factory, can't change flash protection settings");
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return ERROR_FAIL;
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};
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}
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res = target_read_u32(chip->target, NRF51_UICR_CLENR0,
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&clenr0);
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@ -767,7 +767,7 @@ static int nrf51_erase_page(struct flash_bank *bank,
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LOG_ERROR("The chip was not pre-programmed with SoftDevice stack and UICR cannot be erased separately. Please issue mass erase before trying to write to this region");
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return ERROR_FAIL;
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};
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}
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res = nrf51_nvmc_generic_erase(chip,
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NRF51_NVMC_ERASEUICR,
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@ -1148,7 +1148,7 @@ COMMAND_HANDLER(nrf51_handle_mass_erase_command)
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LOG_ERROR("Code region 0 size was pre-programmed at the factory, "
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"mass erase command won't work.");
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return ERROR_FAIL;
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};
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}
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res = nrf51_erase_all(chip);
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if (res != ERROR_OK) {
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@ -430,7 +430,7 @@ static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer,
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&write_algorithm) != ERROR_OK) {
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LOG_WARNING("no working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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}
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/* Change values for counters and row size, depending on variant */
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if (pic32mx_info->dev_type == MX_1_2) {
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@ -221,7 +221,7 @@ static int psoc4_sysreq(struct target *target, uint8_t cmd, uint16_t cmd_param,
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&sysreq_wait_algorithm) != ERROR_OK) {
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LOG_DEBUG("no working area for sysreq code");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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}
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/* Write the code */
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retval = target_write_buffer(target,
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@ -1065,7 +1065,7 @@ static int stellaris_write_block(struct flash_bank *bank,
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&write_algorithm) != ERROR_OK) {
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LOG_DEBUG("no working area for block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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}
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/* plus a buffer big enough for this data */
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if (wcount * 4 < buffer_size)
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@ -1080,7 +1080,7 @@ static int stellaris_write_block(struct flash_bank *bank,
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}
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LOG_DEBUG("retry target_alloc_working_area(%s, size=%u)",
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target_name(target), (unsigned) buffer_size);
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};
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}
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target_write_buffer(target, write_algorithm->address,
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sizeof(stellaris_write_code),
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@ -620,7 +620,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
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&write_algorithm) != ERROR_OK) {
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LOG_WARNING("no working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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}
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retval = target_write_buffer(target, write_algorithm->address,
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sizeof(stm32x_flash_write_code), stm32x_flash_write_code);
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LOG_WARNING("no large enough working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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};
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}
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init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */
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init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (halfword-16bit) */
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@ -551,7 +551,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
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&write_algorithm) != ERROR_OK) {
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LOG_WARNING("no working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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}
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retval = target_write_buffer(target, write_algorithm->address,
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sizeof(stm32x_flash_write_code),
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@ -570,7 +570,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer,
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LOG_WARNING("no large enough working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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};
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}
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armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
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armv7m_info.core_mode = ARM_MODE_THREAD;
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@ -477,7 +477,7 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer,
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&write_algorithm) != ERROR_OK) {
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LOG_WARNING("no working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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}
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retval = target_write_buffer(target, write_algorithm->address,
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sizeof(stm32l4_flash_write_code),
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LOG_WARNING("no large enough working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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};
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}
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armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
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armv7m_info.core_mode = ARM_MODE_THREAD;
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@ -391,7 +391,7 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff
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&write_algorithm) != ERROR_OK) {
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LOG_DEBUG("no working area for block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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}
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/* Write the flashing code */
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retval = target_write_buffer(target,
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@ -487,7 +487,7 @@ static int str7x_write_block(struct flash_bank *bank, const uint8_t *buffer,
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if (target_alloc_working_area_try(target, sizeof(str7x_flash_write_code),
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&write_algorithm) != ERROR_OK) {
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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}
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uint8_t code[sizeof(str7x_flash_write_code)];
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target_buffer_set_u32_array(target, code, ARRAY_SIZE(str7x_flash_write_code),
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@ -390,7 +390,7 @@ static int str9x_write_block(struct flash_bank *bank,
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&write_algorithm) != ERROR_OK) {
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LOG_WARNING("no working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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};
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}
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uint8_t code[sizeof(str9x_flash_write_code)];
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target_buffer_set_u32_array(target, code, ARRAY_SIZE(str9x_flash_write_code),
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@ -471,7 +471,7 @@ if (openjtag_device_desc == NULL) {
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LOG_ERROR("Can't set baud rate to max: %s",
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ftdi_get_error_string(&ftdic));
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return ERROR_JTAG_DEVICE_ERROR;
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};
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}
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#endif
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#if BUILD_OPENJTAG_FTD2XX == 1
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@ -1003,12 +1003,12 @@ static int dsp5680xx_poll(struct target *target)
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__func__);
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target->state = TARGET_UNKNOWN;
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return ERROR_TARGET_FAILURE;
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};
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}
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if (target->state == TARGET_UNKNOWN) {
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LOG_ERROR("%s: Target status invalid - communication failure",
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__func__);
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return ERROR_TARGET_FAILURE;
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};
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}
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return ERROR_OK;
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}
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@ -1573,7 +1573,6 @@ static int xscale_deassert_reset(struct target *target)
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address += buf_cnt;
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}
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;
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retval = xscale_load_ic(target, 0x0,
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xscale->low_vectors);
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