Fix the build.
Main change is to make riscv_addr_t be unsigned. The rest is mechanical fixing of types, print statements, and a few signed/unsigned compares. Smoketest indicates everything is working more or less as before.gitignore-build
parent
845c2f6b69
commit
64af052911
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@ -802,8 +802,8 @@ static int steps_execute(struct algorithm_steps *as,
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int retval = target_write_buffer(target, data_wa->address, bytes,
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data_buf);
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if (retval != ERROR_OK) {
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LOG_ERROR("Failed to write data to 0x%x: %d", data_wa->address,
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retval);
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LOG_ERROR("Failed to write data to 0x%" TARGET_PRIxADDR ": %d",
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data_wa->address, retval);
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return retval;
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}
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@ -811,8 +811,8 @@ static int steps_execute(struct algorithm_steps *as,
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algorithm_wa->address, algorithm_wa->address + 4,
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10000, NULL);
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if (retval != ERROR_OK) {
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LOG_ERROR("Failed to execute algorithm at 0x%x: %d", algorithm_wa->address,
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retval);
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LOG_ERROR("Failed to execute algorithm at 0x%" TARGET_PRIxADDR ": %d",
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algorithm_wa->address, retval);
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return retval;
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}
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}
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@ -866,8 +866,8 @@ static int fespi_write(struct flash_bank *bank, const uint8_t *buffer,
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retval = target_write_buffer(target, algorithm_wa->address,
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sizeof(algorithm_bin), algorithm_bin);
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if (retval != ERROR_OK) {
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LOG_ERROR("Failed to write code to 0x%x: %d", algorithm_wa->address,
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retval);
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LOG_ERROR("Failed to write code to 0x%" TARGET_PRIxADDR ": %d",
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algorithm_wa->address, retval);
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target_free_working_area(target, algorithm_wa);
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algorithm_wa = NULL;
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}
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@ -11,13 +11,13 @@
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#include "config.h"
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#endif
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#include "target.h"
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#include "target/target.h"
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#include "target/algorithm.h"
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#include "target_type.h"
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#include "target/target_type.h"
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#include "log.h"
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#include "jtag/jtag.h"
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#include "register.h"
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#include "breakpoints.h"
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#include "target/register.h"
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#include "target/breakpoints.h"
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#include "helper/time_support.h"
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#include "riscv.h"
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#include "asm.h"
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@ -1630,7 +1630,7 @@ static int add_breakpoint(struct target *target,
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if (breakpoint->type == BKPT_SOFT) {
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if (target_read_memory(target, breakpoint->address, breakpoint->length, 1,
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breakpoint->orig_instr) != ERROR_OK) {
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LOG_ERROR("Failed to read original instruction at 0x%x",
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LOG_ERROR("Failed to read original instruction at 0x%" TARGET_PRIxADDR,
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breakpoint->address);
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return ERROR_FAIL;
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}
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@ -1642,8 +1642,8 @@ static int add_breakpoint(struct target *target,
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retval = target_write_u16(target, breakpoint->address, ebreak_c());
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}
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if (retval != ERROR_OK) {
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LOG_ERROR("Failed to write %d-byte breakpoint instruction at 0x%x",
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breakpoint->length, breakpoint->address);
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LOG_ERROR("Failed to write %d-byte breakpoint instruction at 0x%"
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TARGET_PRIxADDR, breakpoint->length, breakpoint->address);
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return ERROR_FAIL;
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}
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@ -1672,7 +1672,7 @@ static int remove_breakpoint(struct target *target,
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if (target_write_memory(target, breakpoint->address, breakpoint->length, 1,
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breakpoint->orig_instr) != ERROR_OK) {
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LOG_ERROR("Failed to restore instruction for %d-byte breakpoint at "
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"0x%x", breakpoint->length, breakpoint->address);
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"0x%" TARGET_PRIxADDR, breakpoint->length, breakpoint->address);
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return ERROR_FAIL;
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}
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@ -1763,7 +1763,7 @@ static int strict_step(struct target *target, bool announce)
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return ERROR_OK;
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}
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static int step(struct target *target, int current, uint32_t address,
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static int step(struct target *target, int current, target_addr_t address,
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int handle_breakpoints)
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{
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riscv011_info_t *info = get_info(target);
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@ -2196,8 +2196,8 @@ static int riscv011_poll(struct target *target)
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return poll_target(target, true);
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}
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static int riscv011_resume(struct target *target, int current, uint32_t address,
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int handle_breakpoints, int debug_execution)
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static int riscv011_resume(struct target *target, int current,
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target_addr_t address, int handle_breakpoints, int debug_execution)
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{
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riscv011_info_t *info = get_info(target);
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@ -2266,7 +2266,7 @@ static int deassert_reset(struct target *target)
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}
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}
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static int read_memory(struct target *target, uint32_t address,
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static int read_memory(struct target *target, target_addr_t address,
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uint32_t size, uint32_t count, uint8_t *buffer)
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{
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jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
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@ -2377,18 +2377,19 @@ static int read_memory(struct target *target, uint32_t address,
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wait_for_debugint_clear(target, false);
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// Retry.
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LOG_INFO("Retrying memory read starting from 0x%x with more delays",
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address + size * i);
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LOG_INFO("Retrying memory read starting from 0x%" TARGET_PRIxADDR
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" with more delays", address + size * i);
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} else {
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i += batch_size;
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}
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}
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if (result_value != 0) {
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LOG_USER("Core got an exception (0x%x) while reading from 0x%x",
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result_value, address + size * (count-1));
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LOG_USER("Core got an exception (0x%x) while reading from 0x%"
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TARGET_PRIxADDR, result_value, address + size * (count-1));
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if (count > 1) {
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LOG_USER("(It may have failed between 0x%x and 0x%x as well, but we "
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LOG_USER("(It may have failed between 0x%" TARGET_PRIxADDR
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" and 0x%" TARGET_PRIxADDR " as well, but we "
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"didn't check then.)",
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address, address + size * (count-2) + size - 1);
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}
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@ -2431,7 +2432,7 @@ static int setup_write_memory(struct target *target, uint32_t size)
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return ERROR_OK;
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}
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static int write_memory(struct target *target, uint32_t address,
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static int write_memory(struct target *target, target_addr_t address,
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uint32_t size, uint32_t count, const uint8_t *buffer)
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{
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riscv011_info_t *info = get_info(target);
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@ -2536,8 +2537,8 @@ static int write_memory(struct target *target, uint32_t address,
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// Retry.
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// Set t0 back to what it should have been at the beginning of this
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// batch.
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LOG_INFO("Retrying memory write starting from 0x%x with more delays",
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address + size * i);
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LOG_INFO("Retrying memory write starting from 0x%" TARGET_PRIxADDR
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" with more delays", address + size * i);
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cache_clean(target);
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@ -2554,10 +2555,11 @@ static int write_memory(struct target *target, uint32_t address,
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}
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if (result_value != 0) {
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LOG_ERROR("Core got an exception (0x%x) while writing to 0x%x",
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result_value, address + size * (count-1));
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LOG_ERROR("Core got an exception (0x%x) while writing to 0x%"
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TARGET_PRIxADDR, result_value, address + size * (count-1));
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if (count > 1) {
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LOG_ERROR("(It may have failed between 0x%x and 0x%x as well, but we "
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LOG_ERROR("(It may have failed between 0x%" TARGET_PRIxADDR
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" and 0x%" TARGET_PRIxADDR " as well, but we "
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"didn't check then.)",
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address, address + size * (count-2) + size - 1);
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}
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@ -11,13 +11,13 @@
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#include "config.h"
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#endif
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#include "target.h"
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#include "target/target.h"
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#include "target/algorithm.h"
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#include "target_type.h"
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#include "target/target_type.h"
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#include "log.h"
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#include "jtag/jtag.h"
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#include "register.h"
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#include "breakpoints.h"
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#include "target/register.h"
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#include "target/breakpoints.h"
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#include "helper/time_support.h"
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#include "riscv.h"
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#include "debug_defines.h"
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@ -34,7 +34,8 @@ static riscv_addr_t riscv013_progbuf_addr(struct target *target);
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static riscv_addr_t riscv013_progbuf_size(struct target *target);
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static riscv_addr_t riscv013_data_size(struct target *target);
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static riscv_addr_t riscv013_data_addr(struct target *target);
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static void riscv013_set_autoexec(struct target *target, int offset, bool enabled);
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static void riscv013_set_autoexec(struct target *target, unsigned index,
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bool enabled);
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static int riscv013_debug_buffer_register(struct target *target, riscv_addr_t addr);
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static void riscv013_clear_abstract_error(struct target *target);
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@ -52,8 +53,10 @@ static bool riscv013_is_halted(struct target *target);
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static enum riscv_halt_reason riscv013_halt_reason(struct target *target);
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static void riscv013_debug_buffer_enter(struct target *target, struct riscv_program *p);
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static void riscv013_debug_buffer_leave(struct target *target, struct riscv_program *p);
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static void riscv013_write_debug_buffer(struct target *target, int i, riscv_insn_t d);
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static riscv_insn_t riscv013_read_debug_buffer(struct target *target, int i);
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static void riscv013_write_debug_buffer(struct target *target, unsigned index,
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riscv_insn_t d);
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static riscv_insn_t riscv013_read_debug_buffer(struct target *target, unsigned
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index);
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static int riscv013_execute_debug_buffer(struct target *target);
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static void riscv013_fill_dmi_write_u64(struct target *target, char *buf, int a, uint64_t d);
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static void riscv013_fill_dmi_read_u64(struct target *target, char *buf, int a);
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@ -862,8 +865,8 @@ static int add_breakpoint(struct target *target,
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if (breakpoint->type == BKPT_SOFT) {
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if (target_read_memory(target, breakpoint->address, breakpoint->length, 1,
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breakpoint->orig_instr) != ERROR_OK) {
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LOG_ERROR("Failed to read original instruction at 0x%x",
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breakpoint->address);
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LOG_ERROR("Failed to read original instruction at 0x%"
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TARGET_PRIxADDR, breakpoint->address);
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return ERROR_FAIL;
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}
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@ -874,8 +877,8 @@ static int add_breakpoint(struct target *target,
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retval = target_write_u16(target, breakpoint->address, ebreak_c());
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}
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if (retval != ERROR_OK) {
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LOG_ERROR("Failed to write %d-byte breakpoint instruction at 0x%x",
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breakpoint->length, breakpoint->address);
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LOG_ERROR("Failed to write %d-byte breakpoint instruction at 0x%"
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TARGET_PRIxADDR, breakpoint->length, breakpoint->address);
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return ERROR_FAIL;
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}
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@ -903,7 +906,8 @@ static int remove_breakpoint(struct target *target,
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if (target_write_memory(target, breakpoint->address, breakpoint->length, 1,
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breakpoint->orig_instr) != ERROR_OK) {
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LOG_ERROR("Failed to restore instruction for %d-byte breakpoint at "
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"0x%x", breakpoint->length, breakpoint->address);
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"0x%" TARGET_PRIxADDR, breakpoint->length,
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breakpoint->address);
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return ERROR_FAIL;
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}
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@ -1203,7 +1207,7 @@ static int deassert_reset(struct target *target)
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return ERROR_OK;
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}
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static int read_memory(struct target *target, uint32_t address,
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static int read_memory(struct target *target, target_addr_t address,
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uint32_t size, uint32_t count, uint8_t *buffer)
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{
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RISCV013_INFO(info);
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@ -1397,7 +1401,7 @@ static int read_memory(struct target *target, uint32_t address,
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return ERROR_OK;
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}
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static int write_memory(struct target *target, uint32_t address,
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static int write_memory(struct target *target, target_addr_t address,
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uint32_t size, uint32_t count, const uint8_t *buffer)
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{
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RISCV013_INFO(info);
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@ -1770,14 +1774,14 @@ void riscv013_debug_buffer_leave(struct target *target, struct riscv_program *pr
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{
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}
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void riscv013_write_debug_buffer(struct target *target, int index, riscv_insn_t data)
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void riscv013_write_debug_buffer(struct target *target, unsigned index, riscv_insn_t data)
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{
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if (index >= riscv013_progbuf_size(target))
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return dmi_write(target, DMI_DATA0 + index - riscv013_progbuf_size(target), data);
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return dmi_write(target, DMI_PROGBUF0 + index, data);
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}
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riscv_insn_t riscv013_read_debug_buffer(struct target *target, int index)
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riscv_insn_t riscv013_read_debug_buffer(struct target *target, unsigned index)
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{
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if (index >= riscv013_progbuf_size(target))
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return dmi_read(target, DMI_DATA0 + index - riscv013_progbuf_size(target));
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@ -1958,22 +1962,22 @@ riscv_addr_t riscv013_data_addr(struct target *target)
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return info->data_addr;
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}
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void riscv013_set_autoexec(struct target *target, int offset, bool enabled)
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void riscv013_set_autoexec(struct target *target, unsigned index, bool enabled)
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{
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if (offset >= riscv013_progbuf_size(target)) {
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LOG_DEBUG("setting bit %d in AUTOEXECDATA to %d", offset, enabled);
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if (index >= riscv013_progbuf_size(target)) {
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LOG_DEBUG("setting bit %d in AUTOEXECDATA to %d", index, enabled);
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uint32_t aa = dmi_read(target, DMI_ABSTRACTAUTO);
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uint32_t aa_aed = get_field(aa, DMI_ABSTRACTAUTO_AUTOEXECDATA);
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aa_aed &= ~(1 << (offset - riscv013_progbuf_size(target)));
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aa_aed |= (enabled << (offset - riscv013_progbuf_size(target)));
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aa_aed &= ~(1 << (index - riscv013_progbuf_size(target)));
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aa_aed |= (enabled << (index - riscv013_progbuf_size(target)));
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aa = set_field(aa, DMI_ABSTRACTAUTO_AUTOEXECDATA, aa_aed);
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dmi_write(target, DMI_ABSTRACTAUTO, aa);
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} else {
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LOG_DEBUG("setting bit %d in AUTOEXECPROGBUF to %d", offset, enabled);
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LOG_DEBUG("setting bit %d in AUTOEXECPROGBUF to %d", index, enabled);
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uint32_t aa = dmi_read(target, DMI_ABSTRACTAUTO);
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uint32_t aa_aed = get_field(aa, DMI_ABSTRACTAUTO_AUTOEXECPROGBUF);
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aa_aed &= ~(1 << offset);
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aa_aed |= (enabled << offset);
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aa_aed &= ~(1 << index);
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aa_aed |= (enabled << index);
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aa = set_field(aa, DMI_ABSTRACTAUTO_AUTOEXECPROGBUF, aa_aed);
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dmi_write(target, DMI_ABSTRACTAUTO, aa);
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}
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@ -6,13 +6,13 @@
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#include "config.h"
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#endif
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#include "target.h"
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#include "target/target.h"
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#include "target/algorithm.h"
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#include "target_type.h"
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#include "target/target_type.h"
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#include "log.h"
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#include "jtag/jtag.h"
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#include "register.h"
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#include "breakpoints.h"
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#include "target/register.h"
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#include "target/breakpoints.h"
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#include "helper/time_support.h"
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#include "riscv.h"
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#include "gdb_regs.h"
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@ -311,7 +311,7 @@ static int oldriscv_step(struct target *target, int current, uint32_t address,
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static int old_or_new_riscv_step(
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struct target *target,
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int current,
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uint32_t address,
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target_addr_t address,
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int handle_breakpoints
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){
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RISCV_INFO(r);
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@ -417,7 +417,7 @@ static int oldriscv_resume(struct target *target, int current, uint32_t address,
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static int old_or_new_riscv_resume(
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struct target *target,
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int current,
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uint32_t address,
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target_addr_t address,
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int handle_breakpoints,
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int debug_execution
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){
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@ -428,14 +428,14 @@ static int old_or_new_riscv_resume(
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return riscv_openocd_resume(target, current, address, handle_breakpoints, debug_execution);
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}
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static int riscv_read_memory(struct target *target, uint32_t address,
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static int riscv_read_memory(struct target *target, target_addr_t address,
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uint32_t size, uint32_t count, uint8_t *buffer)
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{
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struct target_type *tt = get_target_type(target);
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return tt->read_memory(target, address, size, count, buffer);
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}
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static int riscv_write_memory(struct target *target, uint32_t address,
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static int riscv_write_memory(struct target *target, target_addr_t address,
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uint32_t size, uint32_t count, const uint8_t *buffer)
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{
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struct target_type *tt = get_target_type(target);
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@ -493,8 +493,8 @@ static int riscv_arch_state(struct target *target)
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// Algorithm must end with a software breakpoint instruction.
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static int riscv_run_algorithm(struct target *target, int num_mem_params,
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struct mem_param *mem_params, int num_reg_params,
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struct reg_param *reg_params, uint32_t entry_point,
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uint32_t exit_point, int timeout_ms, void *arch_info)
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struct reg_param *reg_params, target_addr_t entry_point,
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target_addr_t exit_point, int timeout_ms, void *arch_info)
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{
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riscv_info_t *info = (riscv_info_t *) target->arch_info;
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@ -563,7 +563,7 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params,
|
|||
reg_mstatus->type->set(reg_mstatus, mstatus_bytes);
|
||||
|
||||
/// Run algorithm
|
||||
LOG_DEBUG("resume at 0x%x", entry_point);
|
||||
LOG_DEBUG("resume at 0x%" TARGET_PRIxADDR, entry_point);
|
||||
if (oldriscv_resume(target, 0, entry_point, 0, 0) != ERROR_OK) {
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
@ -592,8 +592,8 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params,
|
|||
}
|
||||
uint64_t final_pc = buf_get_u64(reg_pc->value, 0, reg_pc->size);
|
||||
if (final_pc != exit_point) {
|
||||
LOG_ERROR("PC ended up at 0x%" PRIx64 " instead of 0x%" PRIx32,
|
||||
final_pc, exit_point);
|
||||
LOG_ERROR("PC ended up at 0x%" PRIx64 " instead of 0x%"
|
||||
TARGET_PRIxADDR, final_pc, exit_point);
|
||||
return ERROR_FAIL;
|
||||
}
|
||||
|
||||
|
@ -626,7 +626,7 @@ memory. Not yet implemented.
|
|||
*/
|
||||
|
||||
static int riscv_checksum_memory(struct target *target,
|
||||
uint32_t address, uint32_t count,
|
||||
target_addr_t address, uint32_t count,
|
||||
uint32_t* checksum)
|
||||
{
|
||||
*checksum = 0xFFFFFFFF;
|
||||
|
@ -639,9 +639,10 @@ NOR flash which is 1 when "blank")
|
|||
Not yet implemented.
|
||||
*/
|
||||
int riscv_blank_check_memory(struct target * target,
|
||||
uint32_t address,
|
||||
target_addr_t address,
|
||||
uint32_t count,
|
||||
uint32_t * blank)
|
||||
uint32_t * blank,
|
||||
uint8_t erased_value)
|
||||
{
|
||||
*blank = 0;
|
||||
|
||||
|
@ -754,7 +755,7 @@ int riscv_openocd_halt(struct target *target)
|
|||
int riscv_openocd_resume(
|
||||
struct target *target,
|
||||
int current,
|
||||
uint32_t address,
|
||||
target_addr_t address,
|
||||
int handle_breakpoints,
|
||||
int debug_execution
|
||||
) {
|
||||
|
@ -779,7 +780,7 @@ int riscv_openocd_resume(
|
|||
int riscv_openocd_step(
|
||||
struct target *target,
|
||||
int current,
|
||||
uint32_t address,
|
||||
target_addr_t address,
|
||||
int handle_breakpoints
|
||||
) {
|
||||
LOG_DEBUG("stepping rtos hart");
|
||||
|
@ -1149,7 +1150,7 @@ riscv_addr_t riscv_debug_buffer_addr(struct target *target)
|
|||
{
|
||||
RISCV_INFO(r);
|
||||
riscv_addr_t out = r->debug_buffer_addr[riscv_current_hartid(target)];
|
||||
assert(out != -1);
|
||||
assert((out & 3) == 0);
|
||||
return out;
|
||||
}
|
||||
|
||||
|
|
|
@ -20,7 +20,7 @@ extern struct target_type riscv013_target;
|
|||
*/
|
||||
typedef uint64_t riscv_reg_t;
|
||||
typedef uint32_t riscv_insn_t;
|
||||
typedef int64_t riscv_addr_t;
|
||||
typedef uint64_t riscv_addr_t;
|
||||
|
||||
enum riscv_halt_reason {
|
||||
RISCV_HALT_INTERRUPT,
|
||||
|
@ -83,8 +83,9 @@ typedef struct {
|
|||
enum riscv_halt_reason (*halt_reason)(struct target *target);
|
||||
void (*debug_buffer_enter)(struct target *target, struct riscv_program *program);
|
||||
void (*debug_buffer_leave)(struct target *target, struct riscv_program *program);
|
||||
void (*write_debug_buffer)(struct target *target, int i, riscv_insn_t d);
|
||||
riscv_insn_t (*read_debug_buffer)(struct target *target, int i);
|
||||
void (*write_debug_buffer)(struct target *target, unsigned index,
|
||||
riscv_insn_t d);
|
||||
riscv_insn_t (*read_debug_buffer)(struct target *target, unsigned index);
|
||||
int (*execute_debug_buffer)(struct target *target);
|
||||
int (*dmi_write_u64_bits)(struct target *target);
|
||||
void (*fill_dmi_write_u64)(struct target *target, char *buf, int a, uint64_t d);
|
||||
|
@ -115,7 +116,7 @@ int riscv_openocd_halt(struct target *target);
|
|||
int riscv_openocd_resume(
|
||||
struct target *target,
|
||||
int current,
|
||||
uint32_t address,
|
||||
target_addr_t address,
|
||||
int handle_breakpoints,
|
||||
int debug_execution
|
||||
);
|
||||
|
@ -123,7 +124,7 @@ int riscv_openocd_resume(
|
|||
int riscv_openocd_step(
|
||||
struct target *target,
|
||||
int current,
|
||||
uint32_t address,
|
||||
target_addr_t address,
|
||||
int handle_breakpoints
|
||||
);
|
||||
|
||||
|
|
Loading…
Reference in New Issue