Fix the build.

Main change is to make riscv_addr_t be unsigned. The rest is mechanical
fixing of types, print statements, and a few signed/unsigned compares.

Smoketest indicates everything is working more or less as before.
gitignore-build
Tim Newsome 2017-06-13 12:22:26 -07:00
parent 845c2f6b69
commit 64af052911
5 changed files with 85 additions and 77 deletions

View File

@ -802,8 +802,8 @@ static int steps_execute(struct algorithm_steps *as,
int retval = target_write_buffer(target, data_wa->address, bytes,
data_buf);
if (retval != ERROR_OK) {
LOG_ERROR("Failed to write data to 0x%x: %d", data_wa->address,
retval);
LOG_ERROR("Failed to write data to 0x%" TARGET_PRIxADDR ": %d",
data_wa->address, retval);
return retval;
}
@ -811,8 +811,8 @@ static int steps_execute(struct algorithm_steps *as,
algorithm_wa->address, algorithm_wa->address + 4,
10000, NULL);
if (retval != ERROR_OK) {
LOG_ERROR("Failed to execute algorithm at 0x%x: %d", algorithm_wa->address,
retval);
LOG_ERROR("Failed to execute algorithm at 0x%" TARGET_PRIxADDR ": %d",
algorithm_wa->address, retval);
return retval;
}
}
@ -866,8 +866,8 @@ static int fespi_write(struct flash_bank *bank, const uint8_t *buffer,
retval = target_write_buffer(target, algorithm_wa->address,
sizeof(algorithm_bin), algorithm_bin);
if (retval != ERROR_OK) {
LOG_ERROR("Failed to write code to 0x%x: %d", algorithm_wa->address,
retval);
LOG_ERROR("Failed to write code to 0x%" TARGET_PRIxADDR ": %d",
algorithm_wa->address, retval);
target_free_working_area(target, algorithm_wa);
algorithm_wa = NULL;
}

View File

@ -11,13 +11,13 @@
#include "config.h"
#endif
#include "target.h"
#include "target/target.h"
#include "target/algorithm.h"
#include "target_type.h"
#include "target/target_type.h"
#include "log.h"
#include "jtag/jtag.h"
#include "register.h"
#include "breakpoints.h"
#include "target/register.h"
#include "target/breakpoints.h"
#include "helper/time_support.h"
#include "riscv.h"
#include "asm.h"
@ -1630,7 +1630,7 @@ static int add_breakpoint(struct target *target,
if (breakpoint->type == BKPT_SOFT) {
if (target_read_memory(target, breakpoint->address, breakpoint->length, 1,
breakpoint->orig_instr) != ERROR_OK) {
LOG_ERROR("Failed to read original instruction at 0x%x",
LOG_ERROR("Failed to read original instruction at 0x%" TARGET_PRIxADDR,
breakpoint->address);
return ERROR_FAIL;
}
@ -1642,8 +1642,8 @@ static int add_breakpoint(struct target *target,
retval = target_write_u16(target, breakpoint->address, ebreak_c());
}
if (retval != ERROR_OK) {
LOG_ERROR("Failed to write %d-byte breakpoint instruction at 0x%x",
breakpoint->length, breakpoint->address);
LOG_ERROR("Failed to write %d-byte breakpoint instruction at 0x%"
TARGET_PRIxADDR, breakpoint->length, breakpoint->address);
return ERROR_FAIL;
}
@ -1672,7 +1672,7 @@ static int remove_breakpoint(struct target *target,
if (target_write_memory(target, breakpoint->address, breakpoint->length, 1,
breakpoint->orig_instr) != ERROR_OK) {
LOG_ERROR("Failed to restore instruction for %d-byte breakpoint at "
"0x%x", breakpoint->length, breakpoint->address);
"0x%" TARGET_PRIxADDR, breakpoint->length, breakpoint->address);
return ERROR_FAIL;
}
@ -1763,7 +1763,7 @@ static int strict_step(struct target *target, bool announce)
return ERROR_OK;
}
static int step(struct target *target, int current, uint32_t address,
static int step(struct target *target, int current, target_addr_t address,
int handle_breakpoints)
{
riscv011_info_t *info = get_info(target);
@ -2196,8 +2196,8 @@ static int riscv011_poll(struct target *target)
return poll_target(target, true);
}
static int riscv011_resume(struct target *target, int current, uint32_t address,
int handle_breakpoints, int debug_execution)
static int riscv011_resume(struct target *target, int current,
target_addr_t address, int handle_breakpoints, int debug_execution)
{
riscv011_info_t *info = get_info(target);
@ -2266,7 +2266,7 @@ static int deassert_reset(struct target *target)
}
}
static int read_memory(struct target *target, uint32_t address,
static int read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
jtag_add_ir_scan(target->tap, &select_dbus, TAP_IDLE);
@ -2377,18 +2377,19 @@ static int read_memory(struct target *target, uint32_t address,
wait_for_debugint_clear(target, false);
// Retry.
LOG_INFO("Retrying memory read starting from 0x%x with more delays",
address + size * i);
LOG_INFO("Retrying memory read starting from 0x%" TARGET_PRIxADDR
" with more delays", address + size * i);
} else {
i += batch_size;
}
}
if (result_value != 0) {
LOG_USER("Core got an exception (0x%x) while reading from 0x%x",
result_value, address + size * (count-1));
LOG_USER("Core got an exception (0x%x) while reading from 0x%"
TARGET_PRIxADDR, result_value, address + size * (count-1));
if (count > 1) {
LOG_USER("(It may have failed between 0x%x and 0x%x as well, but we "
LOG_USER("(It may have failed between 0x%" TARGET_PRIxADDR
" and 0x%" TARGET_PRIxADDR " as well, but we "
"didn't check then.)",
address, address + size * (count-2) + size - 1);
}
@ -2431,7 +2432,7 @@ static int setup_write_memory(struct target *target, uint32_t size)
return ERROR_OK;
}
static int write_memory(struct target *target, uint32_t address,
static int write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
riscv011_info_t *info = get_info(target);
@ -2536,8 +2537,8 @@ static int write_memory(struct target *target, uint32_t address,
// Retry.
// Set t0 back to what it should have been at the beginning of this
// batch.
LOG_INFO("Retrying memory write starting from 0x%x with more delays",
address + size * i);
LOG_INFO("Retrying memory write starting from 0x%" TARGET_PRIxADDR
" with more delays", address + size * i);
cache_clean(target);
@ -2554,10 +2555,11 @@ static int write_memory(struct target *target, uint32_t address,
}
if (result_value != 0) {
LOG_ERROR("Core got an exception (0x%x) while writing to 0x%x",
result_value, address + size * (count-1));
LOG_ERROR("Core got an exception (0x%x) while writing to 0x%"
TARGET_PRIxADDR, result_value, address + size * (count-1));
if (count > 1) {
LOG_ERROR("(It may have failed between 0x%x and 0x%x as well, but we "
LOG_ERROR("(It may have failed between 0x%" TARGET_PRIxADDR
" and 0x%" TARGET_PRIxADDR " as well, but we "
"didn't check then.)",
address, address + size * (count-2) + size - 1);
}

View File

@ -11,13 +11,13 @@
#include "config.h"
#endif
#include "target.h"
#include "target/target.h"
#include "target/algorithm.h"
#include "target_type.h"
#include "target/target_type.h"
#include "log.h"
#include "jtag/jtag.h"
#include "register.h"
#include "breakpoints.h"
#include "target/register.h"
#include "target/breakpoints.h"
#include "helper/time_support.h"
#include "riscv.h"
#include "debug_defines.h"
@ -34,7 +34,8 @@ static riscv_addr_t riscv013_progbuf_addr(struct target *target);
static riscv_addr_t riscv013_progbuf_size(struct target *target);
static riscv_addr_t riscv013_data_size(struct target *target);
static riscv_addr_t riscv013_data_addr(struct target *target);
static void riscv013_set_autoexec(struct target *target, int offset, bool enabled);
static void riscv013_set_autoexec(struct target *target, unsigned index,
bool enabled);
static int riscv013_debug_buffer_register(struct target *target, riscv_addr_t addr);
static void riscv013_clear_abstract_error(struct target *target);
@ -52,8 +53,10 @@ static bool riscv013_is_halted(struct target *target);
static enum riscv_halt_reason riscv013_halt_reason(struct target *target);
static void riscv013_debug_buffer_enter(struct target *target, struct riscv_program *p);
static void riscv013_debug_buffer_leave(struct target *target, struct riscv_program *p);
static void riscv013_write_debug_buffer(struct target *target, int i, riscv_insn_t d);
static riscv_insn_t riscv013_read_debug_buffer(struct target *target, int i);
static void riscv013_write_debug_buffer(struct target *target, unsigned index,
riscv_insn_t d);
static riscv_insn_t riscv013_read_debug_buffer(struct target *target, unsigned
index);
static int riscv013_execute_debug_buffer(struct target *target);
static void riscv013_fill_dmi_write_u64(struct target *target, char *buf, int a, uint64_t d);
static void riscv013_fill_dmi_read_u64(struct target *target, char *buf, int a);
@ -862,8 +865,8 @@ static int add_breakpoint(struct target *target,
if (breakpoint->type == BKPT_SOFT) {
if (target_read_memory(target, breakpoint->address, breakpoint->length, 1,
breakpoint->orig_instr) != ERROR_OK) {
LOG_ERROR("Failed to read original instruction at 0x%x",
breakpoint->address);
LOG_ERROR("Failed to read original instruction at 0x%"
TARGET_PRIxADDR, breakpoint->address);
return ERROR_FAIL;
}
@ -874,8 +877,8 @@ static int add_breakpoint(struct target *target,
retval = target_write_u16(target, breakpoint->address, ebreak_c());
}
if (retval != ERROR_OK) {
LOG_ERROR("Failed to write %d-byte breakpoint instruction at 0x%x",
breakpoint->length, breakpoint->address);
LOG_ERROR("Failed to write %d-byte breakpoint instruction at 0x%"
TARGET_PRIxADDR, breakpoint->length, breakpoint->address);
return ERROR_FAIL;
}
@ -903,7 +906,8 @@ static int remove_breakpoint(struct target *target,
if (target_write_memory(target, breakpoint->address, breakpoint->length, 1,
breakpoint->orig_instr) != ERROR_OK) {
LOG_ERROR("Failed to restore instruction for %d-byte breakpoint at "
"0x%x", breakpoint->length, breakpoint->address);
"0x%" TARGET_PRIxADDR, breakpoint->length,
breakpoint->address);
return ERROR_FAIL;
}
@ -1203,7 +1207,7 @@ static int deassert_reset(struct target *target)
return ERROR_OK;
}
static int read_memory(struct target *target, uint32_t address,
static int read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
RISCV013_INFO(info);
@ -1397,7 +1401,7 @@ static int read_memory(struct target *target, uint32_t address,
return ERROR_OK;
}
static int write_memory(struct target *target, uint32_t address,
static int write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
RISCV013_INFO(info);
@ -1770,14 +1774,14 @@ void riscv013_debug_buffer_leave(struct target *target, struct riscv_program *pr
{
}
void riscv013_write_debug_buffer(struct target *target, int index, riscv_insn_t data)
void riscv013_write_debug_buffer(struct target *target, unsigned index, riscv_insn_t data)
{
if (index >= riscv013_progbuf_size(target))
return dmi_write(target, DMI_DATA0 + index - riscv013_progbuf_size(target), data);
return dmi_write(target, DMI_PROGBUF0 + index, data);
}
riscv_insn_t riscv013_read_debug_buffer(struct target *target, int index)
riscv_insn_t riscv013_read_debug_buffer(struct target *target, unsigned index)
{
if (index >= riscv013_progbuf_size(target))
return dmi_read(target, DMI_DATA0 + index - riscv013_progbuf_size(target));
@ -1958,22 +1962,22 @@ riscv_addr_t riscv013_data_addr(struct target *target)
return info->data_addr;
}
void riscv013_set_autoexec(struct target *target, int offset, bool enabled)
void riscv013_set_autoexec(struct target *target, unsigned index, bool enabled)
{
if (offset >= riscv013_progbuf_size(target)) {
LOG_DEBUG("setting bit %d in AUTOEXECDATA to %d", offset, enabled);
if (index >= riscv013_progbuf_size(target)) {
LOG_DEBUG("setting bit %d in AUTOEXECDATA to %d", index, enabled);
uint32_t aa = dmi_read(target, DMI_ABSTRACTAUTO);
uint32_t aa_aed = get_field(aa, DMI_ABSTRACTAUTO_AUTOEXECDATA);
aa_aed &= ~(1 << (offset - riscv013_progbuf_size(target)));
aa_aed |= (enabled << (offset - riscv013_progbuf_size(target)));
aa_aed &= ~(1 << (index - riscv013_progbuf_size(target)));
aa_aed |= (enabled << (index - riscv013_progbuf_size(target)));
aa = set_field(aa, DMI_ABSTRACTAUTO_AUTOEXECDATA, aa_aed);
dmi_write(target, DMI_ABSTRACTAUTO, aa);
} else {
LOG_DEBUG("setting bit %d in AUTOEXECPROGBUF to %d", offset, enabled);
LOG_DEBUG("setting bit %d in AUTOEXECPROGBUF to %d", index, enabled);
uint32_t aa = dmi_read(target, DMI_ABSTRACTAUTO);
uint32_t aa_aed = get_field(aa, DMI_ABSTRACTAUTO_AUTOEXECPROGBUF);
aa_aed &= ~(1 << offset);
aa_aed |= (enabled << offset);
aa_aed &= ~(1 << index);
aa_aed |= (enabled << index);
aa = set_field(aa, DMI_ABSTRACTAUTO_AUTOEXECPROGBUF, aa_aed);
dmi_write(target, DMI_ABSTRACTAUTO, aa);
}

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@ -6,13 +6,13 @@
#include "config.h"
#endif
#include "target.h"
#include "target/target.h"
#include "target/algorithm.h"
#include "target_type.h"
#include "target/target_type.h"
#include "log.h"
#include "jtag/jtag.h"
#include "register.h"
#include "breakpoints.h"
#include "target/register.h"
#include "target/breakpoints.h"
#include "helper/time_support.h"
#include "riscv.h"
#include "gdb_regs.h"
@ -311,7 +311,7 @@ static int oldriscv_step(struct target *target, int current, uint32_t address,
static int old_or_new_riscv_step(
struct target *target,
int current,
uint32_t address,
target_addr_t address,
int handle_breakpoints
){
RISCV_INFO(r);
@ -417,7 +417,7 @@ static int oldriscv_resume(struct target *target, int current, uint32_t address,
static int old_or_new_riscv_resume(
struct target *target,
int current,
uint32_t address,
target_addr_t address,
int handle_breakpoints,
int debug_execution
){
@ -428,14 +428,14 @@ static int old_or_new_riscv_resume(
return riscv_openocd_resume(target, current, address, handle_breakpoints, debug_execution);
}
static int riscv_read_memory(struct target *target, uint32_t address,
static int riscv_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct target_type *tt = get_target_type(target);
return tt->read_memory(target, address, size, count, buffer);
}
static int riscv_write_memory(struct target *target, uint32_t address,
static int riscv_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct target_type *tt = get_target_type(target);
@ -493,8 +493,8 @@ static int riscv_arch_state(struct target *target)
// Algorithm must end with a software breakpoint instruction.
static int riscv_run_algorithm(struct target *target, int num_mem_params,
struct mem_param *mem_params, int num_reg_params,
struct reg_param *reg_params, uint32_t entry_point,
uint32_t exit_point, int timeout_ms, void *arch_info)
struct reg_param *reg_params, target_addr_t entry_point,
target_addr_t exit_point, int timeout_ms, void *arch_info)
{
riscv_info_t *info = (riscv_info_t *) target->arch_info;
@ -563,7 +563,7 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params,
reg_mstatus->type->set(reg_mstatus, mstatus_bytes);
/// Run algorithm
LOG_DEBUG("resume at 0x%x", entry_point);
LOG_DEBUG("resume at 0x%" TARGET_PRIxADDR, entry_point);
if (oldriscv_resume(target, 0, entry_point, 0, 0) != ERROR_OK) {
return ERROR_FAIL;
}
@ -592,8 +592,8 @@ static int riscv_run_algorithm(struct target *target, int num_mem_params,
}
uint64_t final_pc = buf_get_u64(reg_pc->value, 0, reg_pc->size);
if (final_pc != exit_point) {
LOG_ERROR("PC ended up at 0x%" PRIx64 " instead of 0x%" PRIx32,
final_pc, exit_point);
LOG_ERROR("PC ended up at 0x%" PRIx64 " instead of 0x%"
TARGET_PRIxADDR, final_pc, exit_point);
return ERROR_FAIL;
}
@ -626,7 +626,7 @@ memory. Not yet implemented.
*/
static int riscv_checksum_memory(struct target *target,
uint32_t address, uint32_t count,
target_addr_t address, uint32_t count,
uint32_t* checksum)
{
*checksum = 0xFFFFFFFF;
@ -639,9 +639,10 @@ NOR flash which is 1 when "blank")
Not yet implemented.
*/
int riscv_blank_check_memory(struct target * target,
uint32_t address,
target_addr_t address,
uint32_t count,
uint32_t * blank)
uint32_t * blank,
uint8_t erased_value)
{
*blank = 0;
@ -754,7 +755,7 @@ int riscv_openocd_halt(struct target *target)
int riscv_openocd_resume(
struct target *target,
int current,
uint32_t address,
target_addr_t address,
int handle_breakpoints,
int debug_execution
) {
@ -779,7 +780,7 @@ int riscv_openocd_resume(
int riscv_openocd_step(
struct target *target,
int current,
uint32_t address,
target_addr_t address,
int handle_breakpoints
) {
LOG_DEBUG("stepping rtos hart");
@ -1149,7 +1150,7 @@ riscv_addr_t riscv_debug_buffer_addr(struct target *target)
{
RISCV_INFO(r);
riscv_addr_t out = r->debug_buffer_addr[riscv_current_hartid(target)];
assert(out != -1);
assert((out & 3) == 0);
return out;
}

View File

@ -20,7 +20,7 @@ extern struct target_type riscv013_target;
*/
typedef uint64_t riscv_reg_t;
typedef uint32_t riscv_insn_t;
typedef int64_t riscv_addr_t;
typedef uint64_t riscv_addr_t;
enum riscv_halt_reason {
RISCV_HALT_INTERRUPT,
@ -83,8 +83,9 @@ typedef struct {
enum riscv_halt_reason (*halt_reason)(struct target *target);
void (*debug_buffer_enter)(struct target *target, struct riscv_program *program);
void (*debug_buffer_leave)(struct target *target, struct riscv_program *program);
void (*write_debug_buffer)(struct target *target, int i, riscv_insn_t d);
riscv_insn_t (*read_debug_buffer)(struct target *target, int i);
void (*write_debug_buffer)(struct target *target, unsigned index,
riscv_insn_t d);
riscv_insn_t (*read_debug_buffer)(struct target *target, unsigned index);
int (*execute_debug_buffer)(struct target *target);
int (*dmi_write_u64_bits)(struct target *target);
void (*fill_dmi_write_u64)(struct target *target, char *buf, int a, uint64_t d);
@ -115,7 +116,7 @@ int riscv_openocd_halt(struct target *target);
int riscv_openocd_resume(
struct target *target,
int current,
uint32_t address,
target_addr_t address,
int handle_breakpoints,
int debug_execution
);
@ -123,7 +124,7 @@ int riscv_openocd_resume(
int riscv_openocd_step(
struct target *target,
int current,
uint32_t address,
target_addr_t address,
int handle_breakpoints
);