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- added lpc2148 test example, and test result 

- corrected str912 makefile eof

git-svn-id: svn://svn.berlios.de/openocd/trunk@411 b42882b7-edfa-0310-969c-e2dbd0fdcd60
__archive__
mifi 2008-03-01 14:32:55 +00:00
parent 02bbe4147d
commit 63e9c3e577
11 changed files with 977 additions and 145 deletions
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50
testing/examples/LPC2148Test/inc/typedefs.h Normal file
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/****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
****************************************************************************
* History:
*
* 30.03.06 mifi First Version for Insight tutorial
****************************************************************************/
#ifndef __TYPEDEFS_H__
#define __TYPEDEFS_H__
/*
* Some types to use Windows like source
*/
typedef char CHAR; /* 8-bit signed data */
typedef unsigned char BYTE; /* 8-bit unsigned data */
typedef unsigned short WORD; /* 16-bit unsigned data */
typedef long LONG; /* 32-bit signed data */
typedef unsigned long ULONG; /* 32-bit unsigned data */
typedef unsigned long DWORD; /* 32-bit unsigned data */
#endif /* !__TYPEDEFS_H_ */
/*** EOF ***/

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testing/examples/LPC2148Test/makefile Normal file
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##############################################################################################
#
# !!!! Do NOT edit this makefile with an editor which replace tabs by spaces !!!!
#
##############################################################################################
#
# On command line:
#
# make all = Create project
#
# make clean = Clean project files.
#
# To rebuild project do "make clean" and "make all".
#
##############################################################################################
# Start of default section
#
TRGT = arm-elf-
CC = $(TRGT)gcc
CP = $(TRGT)objcopy
AS = $(TRGT)gcc -x assembler-with-cpp
BIN = $(CP) -O ihex
MCU = arm7tdmi
# List all default C defines here, like -D_DEBUG=1
DDEFS =
# List all default ASM defines here, like -D_DEBUG=1
DADEFS =
# List all default directories to look for include files here
DINCDIR =
# List the default directory to look for the libraries here
DLIBDIR =
# List all default libraries here
DLIBS =
#
# End of default section
##############################################################################################
##############################################################################################
# Start of user section
#
# Define project name here
PROJECT = test
# Define linker script file here
LDSCRIPT_RAM = ./prj/lpc2148_ram.ld
LDSCRIPT_ROM = ./prj/lpc2148_rom.ld
# List all user C define here, like -D_DEBUG=1
UDEFS =
# Define ASM defines here
UADEFS =
# List C source files here
SRC = ./src/main.c
# List ASM source files here
ASRC = ./src/crt.s
# List all user directories here
UINCDIR = ./inc
# List the user directory to look for the libraries here
ULIBDIR =
# List all user libraries here
ULIBS =
# Define optimisation level here
OPT = -O0
#
# End of user defines
##############################################################################################
INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR))
LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
DEFS = $(DDEFS) $(UDEFS)
ADEFS = $(DADEFS) $(UADEFS)
OBJS = $(ASRC:.s=.o) $(SRC:.c=.o)
LIBS = $(DLIBS) $(ULIBS)
MCFLAGS = -mcpu=$(MCU)
ASFLAGS = $(MCFLAGS) -g -gdwarf-2 -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
CPFLAGS = $(MCFLAGS) $(OPT) -gdwarf-2 -mthumb-interwork -fomit-frame-pointer -Wall -Wstrict-prototypes -fverbose-asm -Wa,-ahlms=$(<:.c=.lst) $(DEFS)
LDFLAGS_RAM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_RAM) -Wl,-Map=$(PROJECT)_ram.map,--cref,--no-warn-mismatch $(LIBDIR)
LDFLAGS_ROM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_ROM) -Wl,-Map=$(PROJECT)_rom.map,--cref,--no-warn-mismatch $(LIBDIR)
# Generate dependency information
CPFLAGS += -MD -MP -MF .dep/$(@F).d
#
# makefile rules
#
all: RAM ROM
RAM: $(OBJS) $(PROJECT)_ram.elf $(PROJECT)_ram.hex
ROM: $(OBJS) $(PROJECT)_rom.elf $(PROJECT)_rom.hex
%o : %c
$(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@
%o : %s
$(AS) -c $(ASFLAGS) $< -o $@
%ram.elf: $(OBJS)
$(CC) $(OBJS) $(LDFLAGS_RAM) $(LIBS) -o $@
%rom.elf: $(OBJS)
$(CC) $(OBJS) $(LDFLAGS_ROM) $(LIBS) -o $@
%hex: %elf
$(BIN) $< $@
clean:
-rm -f $(OBJS)
-rm -f $(PROJECT)_ram.elf
-rm -f $(PROJECT)_ram.map
-rm -f $(PROJECT)_ram.hex
-rm -f $(PROJECT)_rom.elf
-rm -f $(PROJECT)_rom.map
-rm -f $(PROJECT)_rom.hex
-rm -f $(SRC:.c=.c.bak)
-rm -f $(SRC:.c=.lst)
-rm -f $(ASRC:.s=.s.bak)
-rm -f $(ASRC:.s=.lst)
-rm -fR .dep
#
# Include the dependency files, should be the last of the makefile
#
-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
# *** EOF ***

11
testing/examples/LPC2148Test/prj/eclipse_ram.gdb Normal file
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target remote localhost:3333
monitor reset
monitor sleep 500
monitor poll
monitor soft_reset_halt
monitor arm7_9 sw_bkpts enable
monitor mww 0xE01FC040 0x0002
monitor mdw 0xE01FC040
load
break main
continue

11
testing/examples/LPC2148Test/prj/eclipse_rom.gdb Normal file
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target remote localhost:3333
monitor reset
monitor sleep 500
monitor poll
monitor soft_reset_halt
monitor arm7_9 force_hw_bkpts enable
monitor mww 0xE01FC040 0x0002
monitor mdw 0xE01FC040
load
break main
continue

38
testing/examples/LPC2148Test/prj/lpc2148_jtagkey.cfg Normal file
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#daemon configuration
telnet_port 4444
gdb_port 3333
# tell gdb our flash memory map
# and enable flash programming
gdb_memory_map enable
gdb_flash_program enable
#interface
interface ft2232
ft2232_device_desc "Amontec JTAGkey A"
ft2232_layout jtagkey
ft2232_vid_pid 0x0403 0xcff8
jtag_speed 3
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
jtag_device 4 0x1 0xf 0xe
#target configuration
daemon_startup reset
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little run_and_halt 0 arm7tdmi-s_r4
run_and_halt_time 0 30
working_area 0 0x40000000 0x4000 nobackup
#flash bank lpc2000 <base> <size> 0 0 <target#> <variant>
flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765 calc_checksum
# For more information about the configuration files, take a look at:
# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger

140
testing/examples/LPC2148Test/prj/lpc2148_ram.ld Normal file
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/****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
****************************************************************************
*
* History:
*
* 18.12.06 mifi First Version
****************************************************************************/
ENTRY(ResetHandler)
SEARCH_DIR(.)
/*
* Define stack size here
*/
FIQ_STACK_SIZE = 0x0100;
IRQ_STACK_SIZE = 0x0100;
ABT_STACK_SIZE = 0x0100;
UND_STACK_SIZE = 0x0100;
SVC_STACK_SIZE = 0x0400;
/*
* This file, olimex_lpcp2148_ram.ld, locate the program in the internal
* ram of the LPC2148. For more information about the memory of the LPC2148
* take a look in the LPC2141/2142/2144/2146/2148 USER MANUAL.
* Reference is made to the user manual from 25 July 2006 Rev. 02
*
* Take a look at page 8, section 1.Memory maps
*/
MEMORY
{
ram : org = 0x40000000, len = 32k
}
/*
* Do not change the next code
*/
SECTIONS
{
.text :
{
*(.vectors);
. = ALIGN(4);
*(.init);
. = ALIGN(4);
*(.text);
. = ALIGN(4);
*(.rodata);
. = ALIGN(4);
*(.rodata*);
. = ALIGN(4);
*(.glue_7t);
. = ALIGN(4);
*(.glue_7);
. = ALIGN(4);
etext = .;
} > ram
.data :
{
PROVIDE (__data_start = .);
*(.data)
. = ALIGN(4);
edata = .;
_edata = .;
PROVIDE (__data_end = .);
} > ram
.bss :
{
PROVIDE (__bss_start = .);
*(.bss)
*(COMMON)
. = ALIGN(4);
PROVIDE (__bss_end = .);
. = ALIGN(256);
PROVIDE (__stack_start = .);
PROVIDE (__stack_fiq_start = .);
. += FIQ_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_fiq_end = .);
PROVIDE (__stack_irq_start = .);
. += IRQ_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_irq_end = .);
PROVIDE (__stack_abt_start = .);
. += ABT_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_abt_end = .);
PROVIDE (__stack_und_start = .);
. += UND_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_und_end = .);
PROVIDE (__stack_svc_start = .);
. += SVC_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_svc_end = .);
PROVIDE (__stack_end = .);
PROVIDE (__heap_start = .);
} > ram
}
/*** EOF ***/

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testing/examples/LPC2148Test/prj/lpc2148_rom.ld Normal file
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/****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
****************************************************************************
*
* History:
*
* 26.01.08 mifi First Version
****************************************************************************/
ENTRY(ResetHandler)
SEARCH_DIR(.)
/*
* Define stack size here
*/
FIQ_STACK_SIZE = 0x0100;
IRQ_STACK_SIZE = 0x0100;
ABT_STACK_SIZE = 0x0100;
UND_STACK_SIZE = 0x0100;
SVC_STACK_SIZE = 0x0400;
/*
* This file, olimex_lpcp2148_ram.ld, locate the program in the internal
* ram of the LPC2148. For more information about the memory of the LPC2148
* take a look in the LPC2141/2142/2144/2146/2148 USER MANUAL.
* Reference is made to the user manual from 25 July 2006 Rev. 02
*
* Take a look at page 8, section 1.Memory maps
*/
MEMORY
{
rom : org = 0x00000000, len = 512k
ram : org = 0x40000000, len = 32k
}
/*
* Do not change the next code
*/
SECTIONS
{
.text :
{
*(.vectors);
. = ALIGN(4);
*(.init);
. = ALIGN(4);
*(.text);
. = ALIGN(4);
*(.rodata);
. = ALIGN(4);
*(.rodata*);
. = ALIGN(4);
*(.glue_7t);
. = ALIGN(4);
*(.glue_7);
. = ALIGN(4);
etext = .;
} > rom
.data :
{
PROVIDE (__data_start = .);
*(.data)
. = ALIGN(4);
edata = .;
_edata = .;
PROVIDE (__data_end = .);
} > ram
.bss :
{
PROVIDE (__bss_start = .);
*(.bss)
*(COMMON)
. = ALIGN(4);
PROVIDE (__bss_end = .);
. = ALIGN(256);
PROVIDE (__stack_start = .);
PROVIDE (__stack_fiq_start = .);
. += FIQ_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_fiq_end = .);
PROVIDE (__stack_irq_start = .);
. += IRQ_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_irq_end = .);
PROVIDE (__stack_abt_start = .);
. += ABT_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_abt_end = .);
PROVIDE (__stack_und_start = .);
. += UND_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_und_end = .);
PROVIDE (__stack_svc_start = .);
. += SVC_STACK_SIZE;
. = ALIGN(4);
PROVIDE (__stack_svc_end = .);
PROVIDE (__stack_end = .);
PROVIDE (__heap_start = .);
} > ram
}
/*** EOF ***/

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testing/examples/LPC2148Test/src/crt.s Normal file
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/****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
****************************************************************************
*
* History:
*
* 31.03.06 mifi First Version
* This version based on an example from Ethernut and
* "ARM Cross Development with Eclipse" from James P. Lynch
****************************************************************************/
/*
* Some defines for the program status registers
*/
ARM_MODE_USER = 0x10 /* Normal User Mode */
ARM_MODE_FIQ = 0x11 /* FIQ Fast Interrupts Mode */
ARM_MODE_IRQ = 0x12 /* IRQ Standard Interrupts Mode */
ARM_MODE_SVC = 0x13 /* Supervisor Interrupts Mode */
ARM_MODE_ABORT = 0x17 /* Abort Processing memory Faults Mode */
ARM_MODE_UNDEF = 0x1B /* Undefined Instructions Mode */
ARM_MODE_SYS = 0x1F /* System Running in Priviledged Operating Mode */
ARM_MODE_MASK = 0x1F
I_BIT = 0x80 /* disable IRQ when I bit is set */
F_BIT = 0x40 /* disable IRQ when I bit is set */
/*
* Register Base Address
*/
.section .vectors,"ax"
.code 32
/****************************************************************************/
/* Vector table and reset entry */
/****************************************************************************/
_vectors:
ldr pc, ResetAddr /* Reset */
ldr pc, UndefAddr /* Undefined instruction */
ldr pc, SWIAddr /* Software interrupt */
ldr pc, PAbortAddr /* Prefetch abort */
ldr pc, DAbortAddr /* Data abort */
.word 0xB8A06F60
ldr pc, IRQAddr /* IRQ interrupt */
ldr pc, FIQAddr /* FIQ interrupt */
ResetAddr: .word ResetHandler
UndefAddr: .word UndefHandler
SWIAddr: .word SWIHandler
PAbortAddr: .word PAbortHandler
DAbortAddr: .word DAbortHandler
ReservedAddr: .word 0
IRQAddr: .word IRQHandler
FIQAddr: .word FIQHandler
.ltorg
.section .init, "ax"
.code 32
.global ResetHandler
.global ExitFunction
.extern main
/****************************************************************************/
/* Reset handler */
/****************************************************************************/
ResetHandler:
/*
* Wait for the oscillator is stable
*/
nop
nop
nop
nop
nop
nop
nop
nop
/*
* Setup a stack for each mode
*/
msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT /* Undefined Instruction Mode */
ldr sp, =__stack_und_end
msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT /* Abort Mode */
ldr sp, =__stack_abt_end
msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT /* FIQ Mode */
ldr sp, =__stack_fiq_end
msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT /* IRQ Mode */
ldr sp, =__stack_irq_end
msr CPSR_c, #ARM_MODE_SVC | I_BIT | F_BIT /* Supervisor Mode */
ldr sp, =__stack_svc_end
/*
* Clear .bss section
*/
ldr r1, =__bss_start
ldr r2, =__bss_end
ldr r3, =0
bss_clear_loop:
cmp r1, r2
strne r3, [r1], #+4
bne bss_clear_loop
/*
* Jump to main
*/
mrs r0, cpsr
bic r0, r0, #I_BIT | F_BIT /* Enable FIQ and IRQ interrupt */
msr cpsr, r0
mov r0, #0 /* No arguments */
mov r1, #0 /* No arguments */
ldr r2, =main
mov lr, pc
bx r2 /* And jump... */
ExitFunction:
nop
nop
nop
b ExitFunction
/****************************************************************************/
/* Default interrupt handler */
/****************************************************************************/
UndefHandler:
b UndefHandler
SWIHandler:
b SWIHandler
PAbortHandler:
b PAbortHandler
DAbortHandler:
b DAbortHandler
IRQHandler:
b IRQHandler
FIQHandler:
b FIQHandler
.weak ExitFunction
.weak UndefHandler, PAbortHandler, DAbortHandler
.weak IRQHandler, FIQHandler
.ltorg
/*** EOF ***/

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/****************************************************************************
* Copyright (c) 2006 by Michael Fischer. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of its contributors may
* be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
****************************************************************************
* History:
*
* 30.03.06 mifi First Version for Insight tutorial
* 26.01.08 mifi Added variable "d" to test const variable.
****************************************************************************/
#define __MAIN_C__
/*
* I use the include only, to show
* how to setup a include dir in the makefile
*/
#include <stdio.h>
#include <stdlib.h>
#include "typedefs.h"
/*=========================================================================*/
/* DEFINE: All Structures and Common Constants */
/*=========================================================================*/
/*=========================================================================*/
/* DEFINE: Prototypes */
/*=========================================================================*/
/*=========================================================================*/
/* DEFINE: Definition of all local Data */
/*=========================================================================*/
static const DWORD d = 7;
/*=========================================================================*/
/* DEFINE: Definition of all local Procedures */
/*=========================================================================*/
/*=========================================================================*/
/* DEFINE: All code exported */
/*=========================================================================*/
/***************************************************************************/
/* main */
/***************************************************************************/
int main (void)
{
DWORD a = 1;
DWORD b = 2;
DWORD c = 0;
a = a + d;
while (1)
{
a++;
b++;
c = a + b;
}
/*
* This return here make no sense.
* But to prevent the compiler warning:
* "return type of 'main' is not 'int'
* we use an int as return :-)
*/
return(0);
}
/*** EOF ***/

290
testing/examples/STR912Test/makefile
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# #
# !!!! Do NOT edit this makefile with an editor which replace tabs by spaces !!!! # !!!! Do NOT edit this makefile with an editor which replace tabs by spaces !!!!
# #
############################################################################################## ##############################################################################################
# #
# On command line: # On command line:
# #
# make all = Create project # make all = Create project
# #
# make clean = Clean project files. # make clean = Clean project files.
# #
# To rebuild project do "make clean" and "make all". # To rebuild project do "make clean" and "make all".
# #
############################################################################################## ##############################################################################################
# Start of default section # Start of default section
# #
TRGT = arm-elf- TRGT = arm-elf-
CC = $(TRGT)gcc CC = $(TRGT)gcc
CP = $(TRGT)objcopy CP = $(TRGT)objcopy
AS = $(TRGT)gcc -x assembler-with-cpp AS = $(TRGT)gcc -x assembler-with-cpp
BIN = $(CP) -O ihex BIN = $(CP) -O ihex
MCU = arm9e MCU = arm9e
# List all default C defines here, like -D_DEBUG=1 # List all default C defines here, like -D_DEBUG=1
DDEFS = DDEFS =
# List all default ASM defines here, like -D_DEBUG=1 # List all default ASM defines here, like -D_DEBUG=1
DADEFS = DADEFS =
# List all default directories to look for include files here # List all default directories to look for include files here
DINCDIR = DINCDIR =
# List the default directory to look for the libraries here # List the default directory to look for the libraries here
DLIBDIR = DLIBDIR =
# List all default libraries here # List all default libraries here
DLIBS = DLIBS =
# #
# End of default section # End of default section
############################################################################################## ##############################################################################################
############################################################################################## ##############################################################################################
# Start of user section # Start of user section
# #
# Define project name here # Define project name here
PROJECT = test PROJECT = test
# Define linker script file here # Define linker script file here
LDSCRIPT_RAM = ./prj/str912_ram.ld LDSCRIPT_RAM = ./prj/str912_ram.ld
LDSCRIPT_ROM = ./prj/str912_rom.ld LDSCRIPT_ROM = ./prj/str912_rom.ld
# List all user C define here, like -D_DEBUG=1 # List all user C define here, like -D_DEBUG=1
UDEFS = UDEFS =
# Define ASM defines here # Define ASM defines here
UADEFS = UADEFS =
# List C source files here # List C source files here
SRC = ./src/main.c SRC = ./src/main.c
# List ASM source files here # List ASM source files here
ASRC = ./src/startup.s ASRC = ./src/startup.s
# List all user directories here # List all user directories here
UINCDIR = ./inc UINCDIR = ./inc
# List the user directory to look for the libraries here # List the user directory to look for the libraries here
ULIBDIR = ULIBDIR =
# List all user libraries here # List all user libraries here
ULIBS = ULIBS =
# Define optimisation level here # Define optimisation level here
OPT = -O0 OPT = -O0
# #
# End of user defines # End of user defines
############################################################################################## ##############################################################################################
INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR)) INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR))
LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR)) LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
DEFS = $(DDEFS) $(UDEFS) DEFS = $(DDEFS) $(UDEFS)
ADEFS = $(DADEFS) $(UADEFS) ADEFS = $(DADEFS) $(UADEFS)
OBJS = $(ASRC:.s=.o) $(SRC:.c=.o) OBJS = $(ASRC:.s=.o) $(SRC:.c=.o)
LIBS = $(DLIBS) $(ULIBS) LIBS = $(DLIBS) $(ULIBS)
MCFLAGS = -mcpu=$(MCU) MCFLAGS = -mcpu=$(MCU)
ASFLAGS = $(MCFLAGS) -g -gdwarf-2 -Wa,-amhls=$(<:.s=.lst) $(ADEFS) ASFLAGS = $(MCFLAGS) -g -gdwarf-2 -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
CPFLAGS = $(MCFLAGS) $(OPT) -gdwarf-2 -mthumb-interwork -fomit-frame-pointer -Wall -Wstrict-prototypes -fverbose-asm -Wa,-ahlms=$(<:.c=.lst) $(DEFS) CPFLAGS = $(MCFLAGS) $(OPT) -gdwarf-2 -mthumb-interwork -fomit-frame-pointer -Wall -Wstrict-prototypes -fverbose-asm -Wa,-ahlms=$(<:.c=.lst) $(DEFS)
LDFLAGS_RAM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_RAM) -Wl,-Map=$(PROJECT)_ram.map,--cref,--no-warn-mismatch $(LIBDIR) LDFLAGS_RAM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_RAM) -Wl,-Map=$(PROJECT)_ram.map,--cref,--no-warn-mismatch $(LIBDIR)
LDFLAGS_ROM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_ROM) -Wl,-Map=$(PROJECT)_rom.map,--cref,--no-warn-mismatch $(LIBDIR) LDFLAGS_ROM = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT_ROM) -Wl,-Map=$(PROJECT)_rom.map,--cref,--no-warn-mismatch $(LIBDIR)
# Generate dependency information # Generate dependency information
CPFLAGS += -MD -MP -MF .dep/$(@F).d CPFLAGS += -MD -MP -MF .dep/$(@F).d
# #
# makefile rules # makefile rules
# #
all: RAM ROM all: RAM ROM
RAM: $(OBJS) $(PROJECT)_ram.elf $(PROJECT)_ram.hex RAM: $(OBJS) $(PROJECT)_ram.elf $(PROJECT)_ram.hex
ROM: $(OBJS) $(PROJECT)_rom.elf $(PROJECT)_rom.hex ROM: $(OBJS) $(PROJECT)_rom.elf $(PROJECT)_rom.hex
%o : %c %o : %c
$(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@ $(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@
%o : %s %o : %s
$(AS) -c $(ASFLAGS) $< -o $@ $(AS) -c $(ASFLAGS) $< -o $@
%ram.elf: $(OBJS) %ram.elf: $(OBJS)
$(CC) $(OBJS) $(LDFLAGS_RAM) $(LIBS) -o $@ $(CC) $(OBJS) $(LDFLAGS_RAM) $(LIBS) -o $@
%rom.elf: $(OBJS) %rom.elf: $(OBJS)
$(CC) $(OBJS) $(LDFLAGS_ROM) $(LIBS) -o $@ $(CC) $(OBJS) $(LDFLAGS_ROM) $(LIBS) -o $@
%hex: %elf %hex: %elf
$(BIN) $< $@ $(BIN) $< $@
clean: clean:
-rm -f $(OBJS) -rm -f $(OBJS)
-rm -f $(PROJECT)_ram.elf -rm -f $(PROJECT)_ram.elf
-rm -f $(PROJECT)_ram.map -rm -f $(PROJECT)_ram.map
-rm -f $(PROJECT)_ram.hex -rm -f $(PROJECT)_ram.hex
-rm -f $(PROJECT)_rom.elf -rm -f $(PROJECT)_rom.elf
-rm -f $(PROJECT)_rom.map -rm -f $(PROJECT)_rom.map
-rm -f $(PROJECT)_rom.hex -rm -f $(PROJECT)_rom.hex
-rm -f $(SRC:.c=.c.bak) -rm -f $(SRC:.c=.c.bak)
-rm -f $(SRC:.c=.lst) -rm -f $(SRC:.c=.lst)
-rm -f $(ASRC:.s=.s.bak) -rm -f $(ASRC:.s=.s.bak)
-rm -f $(ASRC:.s=.lst) -rm -f $(ASRC:.s=.lst)
-rm -fR .dep -rm -fR .dep
# #
# Include the dependency files, should be the last of the makefile # Include the dependency files, should be the last of the makefile
# #
-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) -include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
# *** EOF *** # *** EOF ***

12
testing/index.html
View File

@ -96,6 +96,18 @@
<td align="center" width="110">320</td> <td align="center" width="110">320</td>
<td align="center" width="110">n/a</td> <td align="center" width="110">n/a</td>
</tr> </tr>
<tr>
<td width="65"><a href="#bdte-ram">bdte-ram</a></td>
<td width="150">lpc2148 ram debugging</td>
<td align="center" width="110">320</td>
<td align="center" width="110">n/a</td>
</tr>
<tr>
<td width="65"><a href="#bdte-rom">bdte-rom</a></td>
<td width="150">lpc2148 rom debugging</td>
<td align="center" width="110">320</td>
<td align="center" width="110">n/a</td>
</tr>
</table> </table>
<p></p> <p></p>
<hr> <hr>