- Fixes '<=' whitespace
- Replace '\(\w\)\(<=\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2368 b42882b7-edfa-0310-969c-e2dbd0fdcd60__archive__
parent
4ce93ac479
commit
6319ea33f7
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@ -916,7 +916,7 @@ static int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
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}
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}
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/* mark erased sectors */
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/* mark erased sectors */
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for (sec=first; sec<=last; sec++)
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for (sec=first; sec <= last; sec++)
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{
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{
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bank->sectors[sec].is_erased = 1;
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bank->sectors[sec].is_erased = 1;
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}
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}
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@ -952,7 +952,7 @@ static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int l
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at91sam7_read_clock_info(bank);
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at91sam7_read_clock_info(bank);
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at91sam7_set_flash_mode(bank, FMR_TIMING_NVBITS);
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at91sam7_set_flash_mode(bank, FMR_TIMING_NVBITS);
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for (sector=first; sector<=last; sector++)
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for (sector=first; sector <= last; sector++)
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{
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{
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if (set)
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if (set)
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cmd = SLB;
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cmd = SLB;
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@ -6955,7 +6955,7 @@ int Jim_EvalExpression(Jim_Interp *interp, Jim_Obj *exprObjPtr,
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case JIM_EXPROP_MUL: wC = wA*wB; break;
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case JIM_EXPROP_MUL: wC = wA*wB; break;
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case JIM_EXPROP_LT: wC = wA<wB; break;
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case JIM_EXPROP_LT: wC = wA<wB; break;
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case JIM_EXPROP_GT: wC = wA>wB; break;
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case JIM_EXPROP_GT: wC = wA>wB; break;
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case JIM_EXPROP_LTE: wC = wA<=wB; break;
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case JIM_EXPROP_LTE: wC = wA <= wB; break;
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case JIM_EXPROP_GTE: wC = wA >= wB; break;
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case JIM_EXPROP_GTE: wC = wA >= wB; break;
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case JIM_EXPROP_LSHIFT: wC = wA<<wB; break;
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case JIM_EXPROP_LSHIFT: wC = wA<<wB; break;
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case JIM_EXPROP_RSHIFT: wC = wA>>wB; break;
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case JIM_EXPROP_RSHIFT: wC = wA>>wB; break;
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@ -7060,7 +7060,7 @@ trydouble:
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case JIM_EXPROP_MUL: dC = dA*dB; break;
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case JIM_EXPROP_MUL: dC = dA*dB; break;
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case JIM_EXPROP_LT: dC = dA<dB; break;
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case JIM_EXPROP_LT: dC = dA<dB; break;
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case JIM_EXPROP_GT: dC = dA>dB; break;
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case JIM_EXPROP_GT: dC = dA>dB; break;
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case JIM_EXPROP_LTE: dC = dA<=dB; break;
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case JIM_EXPROP_LTE: dC = dA <= dB; break;
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case JIM_EXPROP_GTE: dC = dA >= dB; break;
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case JIM_EXPROP_GTE: dC = dA >= dB; break;
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case JIM_EXPROP_NUMEQ: dC = dA==dB; break;
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case JIM_EXPROP_NUMEQ: dC = dA==dB; break;
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case JIM_EXPROP_NUMNE: dC = dA != dB; break;
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case JIM_EXPROP_NUMNE: dC = dA != dB; break;
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@ -175,7 +175,7 @@ void bitq_path_move(pathmove_command_t* cmd)
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{
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{
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int i;
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int i;
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for (i = 0; i<=cmd->num_states; i++)
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for (i = 0; i <= cmd->num_states; i++)
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{
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{
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if (tap_state_transition(tap_get_state(), false) == cmd->path[i])
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if (tap_state_transition(tap_get_state(), false) == cmd->path[i])
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bitq_io(0, 0, 0);
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bitq_io(0, 0, 0);
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@ -1428,7 +1428,7 @@ int arm7_9_debug_entry(target_t *target)
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if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
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if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
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return ERROR_FAIL;
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return ERROR_FAIL;
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for (i=0; i<=15; i++)
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for (i=0; i <= 15; i++)
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{
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{
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LOG_DEBUG("r%i: 0x%8.8" PRIx32 "", i, context[i]);
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LOG_DEBUG("r%i: 0x%8.8" PRIx32 "", i, context[i]);
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buf_set_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).value, 0, 32, context[i]);
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buf_set_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).value, 0, 32, context[i]);
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@ -2362,7 +2362,7 @@ int arm7_9_read_memory(struct target_s *target, uint32_t address, uint32_t size,
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if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
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if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
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return ERROR_FAIL;
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return ERROR_FAIL;
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for (i=0; i<=last_reg; i++)
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for (i=0; i <= last_reg; i++)
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ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).valid;
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ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).valid;
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arm7_9->read_xpsr(target, &cpsr, 0);
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arm7_9->read_xpsr(target, &cpsr, 0);
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@ -2545,7 +2545,7 @@ int arm7_9_write_memory(struct target_s *target, uint32_t address, uint32_t size
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if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
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if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
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return ERROR_FAIL;
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return ERROR_FAIL;
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for (i=0; i<=last_reg; i++)
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for (i=0; i <= last_reg; i++)
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ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).valid;
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ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).dirty = ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, i).valid;
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arm7_9->read_xpsr(target, &cpsr, 0);
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arm7_9->read_xpsr(target, &cpsr, 0);
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