fm3: fix erase flash fail on using High Level Adapters.
This fix can "erase flash" on using High Level Adapters by running algorithm. Because fm3 flash commands must need true 16-bit memory access, but High Level Adapters(ST-Link/TI-ICDI) can 8/32bit access only. Tested on MB9BF618T and MB9AF112K with STLink/V2. Change-Id: I849a8a8e8ae2b3e77717de04f7522cf718c915d7 Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp> Reviewed-on: http://openocd.zylin.com/1944 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>__archive__
Nemui Trinomius
Spencer Oliver
parent
b27c53354d
commit
5fcfe5cfea
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@ -3,6 +3,9 @@
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* openOCD.fseu(AT)de.fujitsu.com *
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* Copyright (C) 2011 Ronny Strutz *
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* *
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* Copyright (C) 2013 Nemui Trinomius *
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* nemuisan_kawausogasuki@live.jp *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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@ -28,8 +31,8 @@
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#include <target/algorithm.h>
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#include <target/armv7m.h>
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#define FLASH_DQ6 0x00000040 /* Data toggle flag bit (TOGG) position */
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#define FLASH_DQ5 0x00000020 /* Time limit exceeding flag bit (TLOV) position */
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#define FLASH_DQ6 0x40 /* Data toggle flag bit (TOGG) position */
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#define FLASH_DQ5 0x20 /* Time limit exceeding flag bit (TLOV) position */
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enum fm3_variant {
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mb9bfxx1, /* Flash Type '1' */
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@ -140,23 +143,23 @@ FLASH_BANK_COMMAND_HANDLER(fm3_flash_bank_command)
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static int fm3_busy_wait(struct target *target, uint32_t offset, int timeout_ms)
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{
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int retval = ERROR_OK;
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uint16_t state1, state2;
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uint8_t state1, state2;
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int ms = 0;
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/* While(1) loop exit via "break" and "return" on error */
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while (1) {
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/* dummy-read - see flash manual */
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retval = target_read_u16(target, offset, &state1);
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retval = target_read_u8(target, offset, &state1);
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if (retval != ERROR_OK)
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return retval;
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/* Data polling 1 */
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retval = target_read_u16(target, offset, &state1);
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retval = target_read_u8(target, offset, &state1);
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if (retval != ERROR_OK)
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return retval;
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/* Data polling 2 */
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retval = target_read_u16(target, offset, &state2);
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retval = target_read_u8(target, offset, &state2);
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if (retval != ERROR_OK)
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return retval;
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@ -168,12 +171,12 @@ static int fm3_busy_wait(struct target *target, uint32_t offset, int timeout_ms)
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/* Retry data polling */
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/* Data polling 1 */
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retval = target_read_u16(target, offset, &state1);
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retval = target_read_u8(target, offset, &state1);
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if (retval != ERROR_OK)
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return retval;
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/* Data polling 2 */
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retval = target_read_u16(target, offset, &state2);
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retval = target_read_u8(target, offset, &state2);
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if (retval != ERROR_OK)
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return retval;
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@ -211,6 +214,10 @@ static int fm3_erase(struct flash_bank *bank, int first, int last)
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uint32_t u32FlashSeqAddress1;
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uint32_t u32FlashSeqAddress2;
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struct working_area *write_algorithm;
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struct reg_param reg_params[3];
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struct armv7m_algorithm armv7m_info;
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u32FlashType = (uint32_t) fm3_info->flashtype;
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if (u32FlashType == fm3_flash_type1) {
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@ -229,8 +236,47 @@ static int fm3_erase(struct flash_bank *bank, int first, int last)
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return ERROR_TARGET_NOT_HALTED;
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}
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/* RAMCODE used for fm3 Flash sector erase: */
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/* R0 keeps Flash Sequence address 1 (u32FlashSeq1) */
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/* R1 keeps Flash Sequence address 2 (u32FlashSeq2) */
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/* R2 keeps Flash Offset address (ofs) */
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const uint8_t fm3_flash_erase_sector_code[] = {
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/* *(uint16_t*)u32FlashSeq1 = 0xAA; */
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0xAA, 0x24, /* MOVS R4, #0xAA */
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0x04, 0x80, /* STRH R4, [R0, #0] */
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/* *(uint16_t*)u32FlashSeq2 = 0x55; */
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0x55, 0x23, /* MOVS R3, #0x55 */
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0x0B, 0x80, /* STRH R3, [R1, #0] */
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/* *(uint16_t*)u32FlashSeq1 = 0x80; */
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0x80, 0x25, /* MOVS R5, #0x80 */
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0x05, 0x80, /* STRH R5, [R0, #0] */
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/* *(uint16_t*)u32FlashSeq1 = 0xAA; */
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0x04, 0x80, /* STRH R4, [R0, #0] */
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/* *(uint16_t*)u32FlashSeq2 = 0x55; */
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0x0B, 0x80, /* STRH R3, [R1, #0] */
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/* Sector_Erase Command (0x30) */
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/* *(uint16_t*)ofs = 0x30; */
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0x30, 0x20, /* MOVS R0, #0x30 */
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0x10, 0x80, /* STRH R0, [R2, #0] */
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/* End Code */
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0x00, 0xBE, /* BKPT #0 */
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};
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LOG_INFO("Fujitsu MB9[A/B]FXXX: Sector Erase ... (%d to %d)", first, last);
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/* disable HW watchdog */
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retval = target_write_u32(target, 0x40011C00, 0x1ACCE551);
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if (retval != ERROR_OK)
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return retval;
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retval = target_write_u32(target, 0x40011C00, 0xE5331AAE);
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if (retval != ERROR_OK)
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return retval;
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retval = target_write_u32(target, 0x40011008, 0x00000000);
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if (retval != ERROR_OK)
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return retval;
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/* FASZR = 0x01, Enables CPU Programming Mode (16-bit Flash acccess) */
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retval = target_write_u32(target, 0x40000000, 0x0001);
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if (retval != ERROR_OK)
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@ -241,6 +287,25 @@ static int fm3_erase(struct flash_bank *bank, int first, int last)
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if (retval != ERROR_OK)
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return retval;
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/* allocate working area with flash sector erase code */
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if (target_alloc_working_area(target, sizeof(fm3_flash_erase_sector_code),
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&write_algorithm) != ERROR_OK) {
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LOG_WARNING("no working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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retval = target_write_buffer(target, write_algorithm->address,
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sizeof(fm3_flash_erase_sector_code), fm3_flash_erase_sector_code);
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if (retval != ERROR_OK)
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return retval;
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armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
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armv7m_info.core_mode = ARM_MODE_THREAD;
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init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32FlashSeqAddress1 */
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init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32FlashSeqAddress2 */
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init_reg_param(®_params[2], "r2", 32, PARAM_OUT); /* offset */
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/* write code buffer and use Flash sector erase code within fm3 */
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for (sector = first ; sector <= last ; sector++) {
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uint32_t offset = bank->sectors[sector].offset;
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@ -248,31 +313,17 @@ static int fm3_erase(struct flash_bank *bank, int first, int last)
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if (odd)
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offset += 4;
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/* Flash unlock sequence */
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retval = target_write_u16(target, u32FlashSeqAddress1, 0x00AA);
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if (retval != ERROR_OK)
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return retval;
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buf_set_u32(reg_params[0].value, 0, 32, u32FlashSeqAddress1);
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buf_set_u32(reg_params[1].value, 0, 32, u32FlashSeqAddress2);
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buf_set_u32(reg_params[2].value, 0, 32, offset);
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retval = target_write_u16(target, u32FlashSeqAddress2, 0x0055);
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if (retval != ERROR_OK)
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return retval;
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retval = target_write_u16(target, u32FlashSeqAddress1, 0x0080);
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if (retval != ERROR_OK)
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return retval;
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retval = target_write_u16(target, u32FlashSeqAddress1, 0x00AA);
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if (retval != ERROR_OK)
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return retval;
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retval = target_write_u16(target, u32FlashSeqAddress2, 0x0055);
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if (retval != ERROR_OK)
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return retval;
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/* Sector erase command (0x0030) */
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retval = target_write_u16(target, offset, 0x0030);
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if (retval != ERROR_OK)
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retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
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write_algorithm->address, 0, 100000, &armv7m_info);
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if (retval != ERROR_OK) {
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LOG_ERROR("Error executing flash erase programming algorithm");
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retval = ERROR_FLASH_OPERATION_FAILED;
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return retval;
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}
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retval = fm3_busy_wait(target, offset, 500);
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if (retval != ERROR_OK)
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@ -281,6 +332,11 @@ static int fm3_erase(struct flash_bank *bank, int first, int last)
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bank->sectors[sector].is_erased = 1;
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}
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target_free_working_area(target, write_algorithm);
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destroy_reg_param(®_params[0]);
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destroy_reg_param(®_params[1]);
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destroy_reg_param(®_params[2]);
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/* FASZR = 0x02, Enables CPU Run Mode (32-bit Flash acccess) */
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retval = target_write_u32(target, 0x40000000, 0x0002);
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if (retval != ERROR_OK)
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@ -766,6 +822,10 @@ static int fm3_chip_erase(struct flash_bank *bank)
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uint32_t u32FlashSeqAddress1;
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uint32_t u32FlashSeqAddress2;
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struct working_area *write_algorithm;
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struct reg_param reg_params[3];
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struct armv7m_algorithm armv7m_info;
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u32FlashType = (uint32_t) fm3_info2->flashtype;
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if (u32FlashType == fm3_flash_type1) {
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@ -786,8 +846,46 @@ static int fm3_chip_erase(struct flash_bank *bank)
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return ERROR_TARGET_NOT_HALTED;
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}
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/* RAMCODE used for fm3 Flash chip erase: */
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/* R0 keeps Flash Sequence address 1 (u32FlashSeq1) */
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/* R1 keeps Flash Sequence address 2 (u32FlashSeq2) */
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const uint8_t fm3_flash_erase_chip_code[] = {
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/* *(uint16_t*)u32FlashSeq1 = 0xAA; */
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0xAA, 0x22, /* MOVS R2, #0xAA */
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0x02, 0x80, /* STRH R2, [R0, #0] */
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/* *(uint16_t*)u32FlashSeq2 = 0x55; */
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0x55, 0x23, /* MOVS R3, #0x55 */
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0x0B, 0x80, /* STRH R3, [R1, #0] */
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/* *(uint16_t*)u32FlashSeq1 = 0x80; */
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0x80, 0x24, /* MOVS R4, #0x80 */
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0x04, 0x80, /* STRH R4, [R0, #0] */
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/* *(uint16_t*)u32FlashSeq1 = 0xAA; */
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0x02, 0x80, /* STRH R2, [R0, #0] */
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/* *(uint16_t*)u32FlashSeq2 = 0x55; */
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0x0B, 0x80, /* STRH R3, [R1, #0] */
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/* Chip_Erase Command 0x10 */
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/* *(uint16_t*)u32FlashSeq1 = 0x10; */
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0x10, 0x21, /* MOVS R1, #0x10 */
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0x01, 0x80, /* STRH R1, [R0, #0] */
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/* End Code */
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0x00, 0xBE, /* BKPT #0 */
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};
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LOG_INFO("Fujitsu MB9[A/B]xxx: Chip Erase ... (may take several seconds)");
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/* disable HW watchdog */
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retval = target_write_u32(target, 0x40011C00, 0x1ACCE551);
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if (retval != ERROR_OK)
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return retval;
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retval = target_write_u32(target, 0x40011C00, 0xE5331AAE);
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if (retval != ERROR_OK)
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return retval;
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retval = target_write_u32(target, 0x40011008, 0x00000000);
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if (retval != ERROR_OK)
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return retval;
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/* FASZR = 0x01, Enables CPU Programming Mode (16-bit Flash access) */
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retval = target_write_u32(target, 0x40000000, 0x0001);
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if (retval != ERROR_OK)
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@ -798,31 +896,38 @@ static int fm3_chip_erase(struct flash_bank *bank)
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if (retval != ERROR_OK)
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return retval;
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/* Flash unlock sequence */
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retval = target_write_u16(target, u32FlashSeqAddress1, 0x00AA);
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/* allocate working area with flash chip erase code */
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if (target_alloc_working_area(target, sizeof(fm3_flash_erase_chip_code),
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&write_algorithm) != ERROR_OK) {
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LOG_WARNING("no working area available, can't do block memory writes");
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
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}
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retval = target_write_buffer(target, write_algorithm->address,
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sizeof(fm3_flash_erase_chip_code), fm3_flash_erase_chip_code);
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if (retval != ERROR_OK)
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return retval;
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retval = target_write_u16(target, u32FlashSeqAddress2, 0x0055);
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if (retval != ERROR_OK)
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return retval;
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armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
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armv7m_info.core_mode = ARM_MODE_THREAD;
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retval = target_write_u16(target, u32FlashSeqAddress1, 0x0080);
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if (retval != ERROR_OK)
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return retval;
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init_reg_param(®_params[0], "r0", 32, PARAM_OUT); /* u32FlashSeqAddress1 */
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init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* u32FlashSeqAddress2 */
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retval = target_write_u16(target, u32FlashSeqAddress1, 0x00AA);
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if (retval != ERROR_OK)
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return retval;
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buf_set_u32(reg_params[0].value, 0, 32, u32FlashSeqAddress1);
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buf_set_u32(reg_params[1].value, 0, 32, u32FlashSeqAddress2);
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retval = target_write_u16(target, u32FlashSeqAddress2, 0x0055);
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if (retval != ERROR_OK)
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retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
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write_algorithm->address, 0, 100000, &armv7m_info);
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if (retval != ERROR_OK) {
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LOG_ERROR("Error executing flash erase programming algorithm");
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retval = ERROR_FLASH_OPERATION_FAILED;
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return retval;
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}
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/* Chip Erase command (0x0010) */
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retval = target_write_u16(target, u32FlashSeqAddress1, 0x0010);
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if (retval != ERROR_OK)
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return retval;
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target_free_working_area(target, write_algorithm);
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destroy_reg_param(®_params[0]);
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destroy_reg_param(®_params[1]);
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retval = fm3_busy_wait(target, u32FlashSeqAddress2, 20000); /* 20s timeout */
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if (retval != ERROR_OK)
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